From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: ARC-Seal: i=1; a=rsa-sha256; t=1516758452; cv=none; d=google.com; s=arc-20160816; b=XA7YkbuF8sm+39dmTZGh4XW7pFuOjfQEy3JAuKrE9Anz+P+9WFRZ9tVWFfpQRiHQSq 3D384f3xQrvorLWOX6/cIMRP8YMswZSiCboABDew5nr8i3AIaHjUSfG9IKfrBZhl7t9a XoMzuEjxF6dFK8a1KzAmiKBBQj5gb+WyZY703xULO3LOEhQ0qLgzKRa/eUux7qiYEGCG 0n97z+P4c3gQYnHu/F1MQQC5ul8HlV4sWastKd93mMqw8aVoroN8rU0GwkmkrNSATV8t AqLf7ZvPuLm24uRH3FdiDiT99ukgw3+zQRHL5fCr3Jt/feQwwkOJpEJQp+hZQlEx7YPJ /FBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=Nl+r3aOeGyXHjcvrSQiXmf1qST7t5wpPxkcfO6uuG4s=; b=HRESpZPcwqkPwNpL66g2YvBvzilYOVOQmdG0k9HYZNKD2/KZQrOMM08MvVK16KZhtv 5tRssvf/ECPXHxjPoJH/FwdWuQfE7jZx0BN3hXWaxFTD4zbzWNZzhufkTjRztpZEQjDj 5nmsXybqEwHAzLTml5+0JZi7bx55N4o7c5ZfJy4MSDVGNlO6peGd5c3VMAdqJk/OrzMw 5ISoit1xWVu3Qg6pEW4gduNObG2qc9PIcKrkyAGOsct1uKYdA4hBFtsFMXy2A7+VqIWm pvX7eXFFtF2+vYcahf8Qf0eeiwO8Ct40pLAZ0BcN0bY4HCouFEZh1aUNzsmDeWZY85Kf YO1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=kNC2QMte; spf=pass (google.com: domain of f.fainelli@gmail.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=f.fainelli@gmail.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=kNC2QMte; spf=pass (google.com: domain of f.fainelli@gmail.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=f.fainelli@gmail.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com X-Google-Smtp-Source: AH8x224Re+RiQWzV8bd9AWIowYNAEKhk+o/Lo81IvWRVQwdVprye7v5w7QIPCMFK9VJl3X9pvkfFqA== From: Florian Fainelli To: linux-mips@linux-mips.org Cc: Florian Fainelli , Florian Fainelli , Ralf Baechle , Kevin Cernekee , James Hogan , Paul Burton , Matt Redfearn , "Maciej W. Rozycki" , Huacai Chen , Kate Stewart , Greg Kroah-Hartman , Marcin Nowakowski , Andrew Morton , "Eric W. Biederman" , Ingo Molnar , David Howells , Kees Cook , Thomas Meyer , "Bryan O'Donoghue" , Robin Murphy , Michal Hocko , Lucas Stach , Vladimir Murzin , Bart Van Assche , linux-kernel@vger.kernel.org (open list) Subject: [PATCH RFC 1/6] MIPS: Allow board to override TLB initialization Date: Tue, 23 Jan 2018 17:47:01 -0800 Message-Id: <1516758426-8127-2-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516758426-8127-1-git-send-email-f.fainelli@gmail.com> References: <1516758426-8127-1-git-send-email-f.fainelli@gmail.com> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590436511200999754?= X-GMAIL-MSGID: =?utf-8?q?1590436511200999754?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: From: Florian Fainelli Some boards may have to override how the TLB initialization is done, e.g: to support eXtended Kseg0/1 features on Broadcom BMIPS boards. Allow this to happen by providing a board_tlb_init() hook. Signed-off-by: Florian Fainelli --- arch/mips/include/asm/traps.h | 1 + arch/mips/kernel/traps.c | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h index f41cf3ee82a7..66c9c855be6e 100644 --- a/arch/mips/include/asm/traps.h +++ b/arch/mips/include/asm/traps.h @@ -26,6 +26,7 @@ extern void (*board_ejtag_handler_setup)(void); extern void (*board_bind_eic_interrupt)(int irq, int regset); extern void (*board_ebase_setup)(void); extern void (*board_cache_error_setup)(void); +extern void (*board_tlb_init)(void); extern int register_nmi_notifier(struct notifier_block *nb); diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 5d19ed07e99d..b03864eb8213 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -106,6 +106,7 @@ void (*board_ejtag_handler_setup)(void); void (*board_bind_eic_interrupt)(int irq, int regset); void (*board_ebase_setup)(void); void(*board_cache_error_setup)(void); +void (*board_tlb_init)(void); static void show_raw_backtrace(unsigned long reg29) { @@ -2230,7 +2231,10 @@ void per_cpu_trap_init(bool is_boot_cpu) /* Boot CPU's cache setup in setup_arch(). */ if (!is_boot_cpu) cpu_cache_init(); - tlb_init(); + if (board_tlb_init) + board_tlb_init(); + else + tlb_init(); TLBMISS_HANDLER_SETUP(); } -- 2.7.4