From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751671AbeA2Qb4 (ORCPT ); Mon, 29 Jan 2018 11:31:56 -0500 Received: from mga09.intel.com ([134.134.136.24]:11475 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751264AbeA2Qak (ORCPT ); Mon, 29 Jan 2018 11:30:40 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,431,1511856000"; d="scan'208";a="25629348" From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: acme@kernel.org, tglx@linutronix.de, jolsa@redhat.com, eranian@google.com, ak@linux.intel.com, Kan Liang Subject: [PATCH V3 3/5] perf/x86/intel/ds: introduce read function for large pebs Date: Mon, 29 Jan 2018 08:29:31 -0800 Message-Id: <1517243373-355481-4-git-send-email-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1517243373-355481-1-git-send-email-kan.liang@linux.intel.com> References: <1517243373-355481-1-git-send-email-kan.liang@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang When the PEBS interrupt threshold is larger than one, there is no way to get exact auto-reload times and value, which needed for event update unless flush the PEBS buffer. Introduce intel_pmu_large_pebs_read() to drain the PEBS buffer in event read when large PEBS is enabled. To prevent the race, the drain_pebs() only be called when the PMU is disabled. Unconditionally call x86_perf_event_update() for large pebs. - It is easily to call pmu::read() twice in a short period. There could be no samples in the PEBS buffer. x86_perf_event_update() is needed to update the count. - There is no harmful to call x86_perf_event_update() for other cases. - It's safe. Don't need to worry about the auto-reload. Because the PMU is disabled. Signed-off-by: Kan Liang --- arch/x86/events/intel/ds.c | 16 ++++++++++++++++ arch/x86/events/perf_event.h | 2 ++ 2 files changed, 18 insertions(+) diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 6533426..1c11fa2 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1303,6 +1303,22 @@ get_next_pebs_record_by_bit(void *base, void *top, int bit) return NULL; } +int intel_pmu_large_pebs_read(struct perf_event *event) +{ + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + + /* Check if the event has large pebs */ + if (!pebs_needs_sched_cb(cpuc)) + return 0; + + perf_pmu_disable(event->pmu); + intel_pmu_drain_pebs_buffer(); + x86_perf_event_update(event); + perf_pmu_enable(event->pmu); + + return 1; +} + /* * Specific intel_pmu_save_and_restart() for auto-reload. * It only be called from drain_pebs(). diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h index 805400b..7d3cd32 100644 --- a/arch/x86/events/perf_event.h +++ b/arch/x86/events/perf_event.h @@ -923,6 +923,8 @@ void intel_pmu_pebs_disable_all(void); void intel_pmu_pebs_sched_task(struct perf_event_context *ctx, bool sched_in); +int intel_pmu_large_pebs_read(struct perf_event *event); + void intel_ds_init(void); void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in); -- 2.7.4