From: David Woodhouse <dwmw2@infradead.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>,
arjan@linux.intel.com, karahmed@amazon.de, x86@kernel.org,
linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com,
peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com,
torvalds@linux-foundation.org, gregkh@linux-foundation.org
Subject: Re: [PATCH] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on Intel
Date: Tue, 30 Jan 2018 12:09:53 +0000 [thread overview]
Message-ID: <1517314193.18619.115.camel@infradead.org> (raw)
In-Reply-To: <alpine.DEB.2.20.1801301235500.1797@nanos>
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On Tue, 2018-01-30 at 12:37 +0100, Thomas Gleixner wrote:
> In any case, if there is ucode mismatch between CPUs the whole thing is
> hosed anyway no matter what. So can you please agree on a solution so we
> can unbreak the current state of affairs?
If there is µcode mismatch between CPUs then the inconsistent bits
should be filtered down to the lowest common denominator and we
shouldn't use the features that are not consistently present. That much
ought to work already with my patch.
Boris's version uses setup_force_cpu_cap() and forces the bit to be set
even on secondary CPUs which don't really have it, and thus it won't
get filtered out. We'll try to use it, and it will fault on the CPUs
which don't have it.
That's the difference.
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next prev parent reply other threads:[~2018-01-30 12:09 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-29 23:49 David Woodhouse
2018-01-30 10:37 ` Thomas Gleixner
2018-01-30 10:58 ` Borislav Petkov
2018-01-30 11:03 ` David Woodhouse
2018-01-30 11:18 ` Borislav Petkov
2018-01-30 11:28 ` David Woodhouse
2018-01-30 11:37 ` Thomas Gleixner
2018-01-30 12:09 ` David Woodhouse [this message]
2018-01-30 12:57 ` Thomas Gleixner
2018-01-30 13:11 ` Borislav Petkov
2018-01-30 14:01 ` Arjan van de Ven
2018-01-30 14:54 ` Alan Cox
2018-01-30 14:57 ` David Woodhouse
2018-01-30 18:19 ` Henrique de Moraes Holschuh
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