From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x224DGVOLg8feT9xyJeUL3tELGbaxw7EkGe1xLvL4VrpbEQo6+F+cl6a7VdsjAx7m1jy2wori ARC-Seal: i=1; a=rsa-sha256; t=1517404258; cv=none; d=google.com; s=arc-20160816; b=OWO1wY0Eo94I0m+YcKfIhoiUUixOdejS1T6OtD36JgnSR5omlXH10TCl5svPXA706P VOATq7i+ced/FmGxY6QNZB4lNbn+BD6RTmfVhMz1Ip/2BvAMRo/8fY34Tcs3Y1+fY8bq nRJxqVtsq/VwO1Lp48lU32nMI9yAOnMrlxH6jVFduvPZmwmTt3fBbCrs7y6uM5iNSEpD dgBWFrWnah/IxPmsK8BbyoBYAZ333203UiQDnhrJc6THg2Iget7ZBk5rig38wXcfrjxb gxpj9yQk2zEr1/cIUTQIfdmKh4bKvz0hq3jGb9Rq5lrGaCRKBxSBg7km7HrqghmATe4z slww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=gkRHW2Js41I0iILPaYuz+c/bXFGVZbHtocj8NLtQnpE=; b=nSEN0OL0OjrWszRMAqQaTy0UdtkdD0UVPhqtXtcl2h7rUxW2F2mCuQHbvDMnNhWMQT FTErWPOBH5dnq31fxgw1yXkhyYMJFoeL/NbqDMyYEpzTlLjAbkcaoVwhdEoSdc1E30ia ZxB0PmlXUblnNiOHh2eCWWm0aJJKpODTLKBdXB8U3JiGP88pgRSeQVHORa8SiYBrnwxj vHPyyXmgDZMbf6U/FejDo2zsDe0JbGMAH+qAhxBXVV2eN1QsH3lh4rIFjHSfDVIz7UEp ydkfbYf39rAscNlncHOlLa/8KhfUdEKzd1NxbR+1vIT2Y/XgHSgCkLc2SCRelZ5ajzLM Ioag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amazon.de header.s=amazon201209 header.b=tIv/Qw4k; spf=pass (google.com: domain of prvs=562a19d0d=karahmed@amazon.com designates 52.95.49.90 as permitted sender) smtp.mailfrom=prvs=562a19d0d=karahmed@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.de Authentication-Results: mx.google.com; dkim=pass header.i=@amazon.de header.s=amazon201209 header.b=tIv/Qw4k; spf=pass (google.com: domain of prvs=562a19d0d=karahmed@amazon.com designates 52.95.49.90 as permitted sender) smtp.mailfrom=prvs=562a19d0d=karahmed@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.de X-IronPort-AV: E=Sophos;i="5.46,440,1511827200"; d="scan'208";a="329959914" From: KarimAllah Ahmed To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: KarimAllah Ahmed , Asit Mallick , Dave Hansen , Arjan Van De Ven , Tim Chen , Linus Torvalds , Andrea Arcangeli , Andi Kleen , Thomas Gleixner , Dan Williams , Jun Nakajima , Andy Lutomirski , Greg KH , Paolo Bonzini , Ashok Raj , David Woodhouse Subject: [PATCH v4 3/5] KVM: VMX: Emulate MSR_IA32_ARCH_CAPABILITIES Date: Wed, 31 Jan 2018 14:10:29 +0100 Message-Id: <1517404231-22406-4-git-send-email-karahmed@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1517404231-22406-1-git-send-email-karahmed@amazon.de> References: <1517404231-22406-1-git-send-email-karahmed@amazon.de> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1591113687537348830?= X-GMAIL-MSGID: =?utf-8?q?1591113687537348830?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: Future intel processors will use MSR_IA32_ARCH_CAPABILITIES MSR to indicate RDCL_NO (bit 0) and IBRS_ALL (bit 1). This is a read-only MSR. By default the contents will come directly from the hardware, but user-space can still override it. [dwmw2: The bit in kvm_cpuid_7_0_edx_x86_features can be unconditional] Cc: Asit Mallick Cc: Dave Hansen Cc: Arjan Van De Ven Cc: Tim Chen Cc: Linus Torvalds Cc: Andrea Arcangeli Cc: Andi Kleen Cc: Thomas Gleixner Cc: Dan Williams Cc: Jun Nakajima Cc: Andy Lutomirski Cc: Greg KH Cc: Paolo Bonzini Cc: Ashok Raj Reviewed-by: Paolo Bonzini Signed-off-by: KarimAllah Ahmed Signed-off-by: David Woodhouse --- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/vmx.c | 15 +++++++++++++++ arch/x86/kvm/x86.c | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 033004d..1909635 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -394,7 +394,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, /* cpuid 7.0.edx*/ const u32 kvm_cpuid_7_0_edx_x86_features = - F(AVX512_4VNNIW) | F(AVX512_4FMAPS); + F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(ARCH_CAPABILITIES); /* all calls to cpuid_count() should be made on the same cpu */ get_cpu(); diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 96e672e..40643b8 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -592,6 +592,8 @@ struct vcpu_vmx { u64 msr_host_kernel_gs_base; u64 msr_guest_kernel_gs_base; #endif + u64 arch_capabilities; + u32 vm_entry_controls_shadow; u32 vm_exit_controls_shadow; u32 secondary_exec_control; @@ -3236,6 +3238,12 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_IA32_TSC: msr_info->data = guest_read_tsc(vcpu); break; + case MSR_IA32_ARCH_CAPABILITIES: + if (!msr_info->host_initiated && + !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES)) + return 1; + msr_info->data = to_vmx(vcpu)->arch_capabilities; + break; case MSR_IA32_SYSENTER_CS: msr_info->data = vmcs_read32(GUEST_SYSENTER_CS); break; @@ -3362,6 +3370,11 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, MSR_IA32_PRED_CMD, MSR_TYPE_W); break; + case MSR_IA32_ARCH_CAPABILITIES: + if (!msr_info->host_initiated) + return 1; + vmx->arch_capabilities = data; + break; case MSR_IA32_CR_PAT: if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) { if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data)) @@ -5624,6 +5637,8 @@ static void vmx_vcpu_setup(struct vcpu_vmx *vmx) ++vmx->nmsrs; } + if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, vmx->arch_capabilities); vm_exit_controls_init(vmx, vmcs_config.vmexit_ctrl); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c53298d..4ec142e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1009,6 +1009,7 @@ static u32 msrs_to_save[] = { #endif MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA, MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX, + MSR_IA32_ARCH_CAPABILITIES }; static unsigned num_msrs_to_save; -- 2.7.4