From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x226UGsOV9VG7REpeqSwZMq7E7OzBvwc7YEsp2+EleFWWx6qFyuwsH5N68UAIZ3IVz5y3WxPf ARC-Seal: i=1; a=rsa-sha256; t=1517415549; cv=none; d=google.com; s=arc-20160816; b=BBCXS00xDXfqtv8A2UfPANXtlh9cOCN58Xo/jLGTeS/C+AAddjoEE50wEcnGxaHVVj KMzYpy8ZkHcVnGFFlZknwCck2KjljEVKrphQUD+j1XTXXiWmG3Si+9TNEz/+0uckIaqV 5s+H+R8dhMDjpljvUk/m2chGGscXFdevhBYl07XJbGnbfrOicuBd7MTmOxHFY6+UsFoh 0up0g7yhbFfs01U0STYdV0kDqI5FSPzBjorgC0jYyYVAb7IVLsC6fQ1MojhpitS+OQI7 W5BD8051z1N7gbAISETUqD5H53MyfGCGvL6lhqomwJPn0yHJhUGxgYbcjEuTmdLzPn89 Fn4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:dmarc-filter:dkim-signature :dkim-signature:arc-authentication-results; bh=1eMVivQkV/z16UPjpnzw4/lBRlNrSEvr6AcMRbSPHe8=; b=NYAlipoZGjbBiwPL1BL0P858rKUS7DED3OaIIklPurAOupm5i2M90g9rlNowa6HMGI IdgWis0vTfCz16EXFv0i2Uv2Z4bI/GAoEq7qdaLImgppqAjZU2zNiDhH+Xkr3ixdM3E5 +B7rKX8j9dbezJqWff0GIvoj7MaCXzcwU8aBvgIn77b7irWVDRTTMVTeaHMSo4a34zXe QiV07Z0o+Hx/K/wvHYKJPgo4f2QUEVE70AN+Imo+i9NqXXsy+NHBw1EVux0YjuU5sGAs DX0sHx8wXqSeiCaVqWV/3St8G0XoE/qnvjZVYZy99uhxfJdW6wrg8pAlKmVstSovCXk5 EeTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=ovLW7t0Z; dkim=pass header.i=@codeaurora.org header.s=default header.b=XCfgDzjF; spf=pass (google.com: domain of poza@codeaurora.org designates 198.145.29.96 as permitted sender) smtp.mailfrom=poza@codeaurora.org Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=ovLW7t0Z; dkim=pass header.i=@codeaurora.org header.s=default header.b=XCfgDzjF; spf=pass (google.com: domain of poza@codeaurora.org designates 198.145.29.96 as permitted sender) smtp.mailfrom=poza@codeaurora.org DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3689760112 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=poza@codeaurora.org From: Oza Pawandeep To: Bjorn Helgaas , Philippe Ombredanne , Thomas Gleixner , Greg Kroah-Hartman , Kate Stewart , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Dongdong Liu , Keith Busch , Wei Zhang , Sinan Kaya , Timur Tabi Cc: Oza Pawandeep Subject: [PATCH] PCI/DPC: Fix INT legacy interrupt in dpc_irq Date: Wed, 31 Jan 2018 21:48:55 +0530 Message-Id: <1517415535-21850-1-git-send-email-poza@codeaurora.org> X-Mailer: git-send-email 1.9.1 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1591125527357545721?= X-GMAIL-MSGID: =?utf-8?q?1591125527357545721?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: Current dpc driver acknowledge the interrupt in deferred work, which works okay since LPI are edge triggered. But when RP does not have MSI support, port service driver falls back to legacy GIC SPI interrupts, and with current code we do not acknowledge the interrupt and we get dpc interrupt storm. This patch acknowledges the interrupt in interrupt handler. Signed-off-by: Oza Pawandeep diff --git a/drivers/pci/pcie/pcie-dpc.c b/drivers/pci/pcie/pcie-dpc.c index 2d976a6..570b561 100644 --- a/drivers/pci/pcie/pcie-dpc.c +++ b/drivers/pci/pcie/pcie-dpc.c @@ -134,7 +134,7 @@ static void interrupt_event_handler(struct work_struct *work) } pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, - PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT); + PCI_EXP_DPC_STATUS_TRIGGER); } static void dpc_rp_pio_print_tlp_header(struct device *dev, @@ -277,6 +277,8 @@ static irqreturn_t dpc_irq(int irq, void *context) schedule_work(&dpc->work); } + pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, + PCI_EXP_DPC_STATUS_INTERRUPT); return IRQ_HANDLED; } -- Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc., a Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.