From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752821AbeBFQgE (ORCPT ); Tue, 6 Feb 2018 11:36:04 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:16166 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752623AbeBFQep (ORCPT ); Tue, 6 Feb 2018 11:34:45 -0500 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 06 Feb 2018 08:34:44 -0800 From: Peter De Schrijver To: , , , , , , , , , CC: Peter De Schrijver Subject: [PATCH v3 11/11] arm64: dts: nvidia: Tegra210 CPU clock definition Date: Tue, 6 Feb 2018 18:34:12 +0200 Message-ID: <1517934852-23255-12-git-send-email-pdeschrijver@nvidia.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1517934852-23255-1-git-send-email-pdeschrijver@nvidia.com> References: <1517934852-23255-1-git-send-email-pdeschrijver@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.21.24.170] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Peter De Schrijver --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index bc9851a..a7fddae 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1229,6 +1229,13 @@ device_type = "cpu"; compatible = "arm,cortex-a57"; reg = <0>; + clocks = <&tegra_car TEGRA210_CLK_CCLK_G>, + <&tegra_car TEGRA210_CLK_PLL_X>, + <&tegra_car TEGRA210_CLK_PLL_P_OUT_CPU>, + <&dfll>; + clock-names = "cpu_g", "pll_x", "pll_p", "dfll"; + /* FIXME: what's the actual transition time? */ + clock-latency = <300000>; }; cpu@1 { -- 1.9.1