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From: Rohit Agarwal <quic_rohiagar@quicinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <agross@kernel.org>, <bjorn.andersson@linaro.org>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/8] clk: qcom: Add A7 PLL support for SDX65
Date: Tue, 15 Feb 2022 11:15:13 +0530	[thread overview]
Message-ID: <151d2942-7b47-8d5c-8caa-3b88895b2abf@quicinc.com> (raw)
In-Reply-To: <20220214084214.GD3494@thinkpad>


On 2/14/2022 2:12 PM, Manivannan Sadhasivam wrote:
> On Mon, Feb 14, 2022 at 12:29:47PM +0530, Rohit Agarwal wrote:
>> Add support for PLL found in Qualcomm SDX65 platforms which is used to
>> provide clock to the Cortex A7 CPU via a mux. This PLL can provide high
>> frequency clock to the CPU above 1GHz as compared to the other sources
>> like GPLL0.
>>
>> In this driver, the power domain is attached to the cpudev. This is
>> required for CPUFreq functionality and there seems to be no better place
>> to do other than this driver (no dedicated CPUFreq driver).
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> ---
>>   drivers/clk/qcom/Kconfig  | 6 +++---
>>   drivers/clk/qcom/a7-pll.c | 1 +
>>   2 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
>> index 6cd0634..1904ba1 100644
>> --- a/drivers/clk/qcom/Kconfig
>> +++ b/drivers/clk/qcom/Kconfig
>> @@ -29,11 +29,11 @@ config QCOM_A53PLL
>>   	  devices.
>>   
>>   config QCOM_A7PLL
>> -	tristate "SDX55 A7 PLL"
>> +	tristate "SDX55 like A7 PLL"
> A7 PLL driver for SDX55 and SDX65
Will do.
>
>>   	help
>> -	  Support for the A7 PLL on SDX55 devices. It provides the CPU with
>> +	  Support for the A7 PLL on SDX55 like devices. It provides the CPU with
>>   	  frequencies above 1GHz.
>> -	  Say Y if you want to support higher CPU frequencies on SDX55
>> +	  Say Y if you want to support higher CPU frequencies on SDX55 like
> Say Y if you want to support higher CPU frequencies on devices such as SDX55 and
> SDX65.
Will do.
> Thanks,
> Mani
>
>>   	  devices.
>>   
>>   config QCOM_CLK_APCS_MSM8916
>> diff --git a/drivers/clk/qcom/a7-pll.c b/drivers/clk/qcom/a7-pll.c
>> index c4a53e5..adb2121 100644
>> --- a/drivers/clk/qcom/a7-pll.c
>> +++ b/drivers/clk/qcom/a7-pll.c
>> @@ -84,6 +84,7 @@ static int qcom_a7pll_probe(struct platform_device *pdev)
>>   
>>   static const struct of_device_id qcom_a7pll_match_table[] = {
>>   	{ .compatible = "qcom,sdx55-a7pll" },
>> +	{ .compatible = "qcom,sdx65-a7pll" },
>>   	{ }
>>   };
>>   MODULE_DEVICE_TABLE(of, qcom_a7pll_match_table);
>> -- 
>> 2.7.4
>>

      reply	other threads:[~2022-02-15  5:45 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-14  6:59 Rohit Agarwal
2022-02-14  8:42 ` Manivannan Sadhasivam
2022-02-15  5:45   ` Rohit Agarwal [this message]

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