From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751750AbeCZH6f (ORCPT ); Mon, 26 Mar 2018 03:58:35 -0400 Received: from exmail.andestech.com ([59.124.169.137]:48437 "EHLO ATCSQR.andestech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750983AbeCZH6e (ORCPT ); Mon, 26 Mar 2018 03:58:34 -0400 From: Alan Kao To: Palmer Dabbelt , Albert Ou , "Peter Zijlstra" , Ingo Molnar , "Arnaldo Carvalho de Melo" , Alexander Shishkin , Jiri Olsa , "Namhyung Kim" , Alex Solomatnikov , "Jonathan Corbet" , , , CC: Alan Kao Subject: [PATCH 0/2] perf: riscv: Preliminary Perf Event Support on RISC-V Date: Mon, 26 Mar 2018 15:57:53 +0800 Message-ID: <1522051075-6442-1-git-send-email-alankao@andestech.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.0.1.85] X-DNSRBL: X-MAIL: ATCSQR.andestech.com w2Q7rrob048911 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This implements the baseline PMU for RISC-V platforms. To ease the future PMU portings, a guide is also written, containing perf concepts, arch porting practices and some hints. Alan Kao (2): perf: riscv: preliminary RISC-V support perf: riscv: Add Document for Future Porting Guide Documentation/riscv/pmu.txt | 250 +++++++++++++++++++ arch/riscv/Kconfig | 12 + arch/riscv/include/asm/perf_event.h | 76 +++++- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/perf_event.c | 469 ++++++++++++++++++++++++++++++++++++ 5 files changed, 804 insertions(+), 4 deletions(-) create mode 100644 Documentation/riscv/pmu.txt create mode 100644 arch/riscv/kernel/perf_event.c -- 2.16.2