From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752822AbbIWHwR (ORCPT ); Wed, 23 Sep 2015 03:52:17 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:50698 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752613AbbIWHwP (ORCPT ); Wed, 23 Sep 2015 03:52:15 -0400 From: Arnd Bergmann To: David Daney Cc: linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org, Will Deacon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Marc Zyngier , David Daney Subject: Re: [PATCH v2] PCI: generic: Add support for Cavium ThunderX PCIe root complexes. Date: Wed, 23 Sep 2015 09:51:30 +0200 Message-ID: <1524364.fcqUh1gtkt@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <1442967415-13595-1-git-send-email-ddaney.cavm@gmail.com> References: <1442967415-13595-1-git-send-email-ddaney.cavm@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:3ck/VkOtfNE6rNEkm+F7Moz/WQL4gzGW/+2wgB+0XtWTXY6WDv6 O7FV1L9nr5LdMSpqLKX63i/q5ZyomyuBY8MklER/j21QIQ228Zi5LKQ281YeBxNSi/LahTc axef+3zj6o71ZTTGVwHZo+WUwB7Aq1JzPaDAiJECdPjBBVQTHg7GiSVxmL2YA+J/eucODQX PCYM7yD8CO10GZxZYwhNQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:q89KsDPBCYw=:Cda5cabIOcuFa+uw1JBP8M GD8ZKrgBv5QsSAWKaV3ALffPwZZLF534CXHyEvkslx7ea+8KQ/YKsLTYljU3FhQXEEFCjcMWF nhXUuaub0SKFfmQzkes+CcESJE00P3xkTmHBfqL4ILOfb84oO9pQDD2Qna6oB/j4XA3ZkRcLd iOPgNP8BKWal6MuJpNbA8jQ9o79BTWAGr2AbkYMmSoAqyGtm1fV3588fgb/YItyEBg8nyQ767 A29gQh7zPLEK0lRm8/92wRd/0d5YPUUO1CTi7+O/a21khs1ey4NomCM2m8Hs1jpyDFv/q6i7o dbMBEKcSc8H763Af8L0EhVDx0ArOmbxWn/7cghB/A/KjTxLIURs3UXRWbwhq9sGkpwVEkR3r2 W11Jvsgu6RuMZPU8NZrktCa4JyBxT0wKf6RDIdePYJhWczQlusNE6QjOoD161xESgGUV9/GEa A24GyiURwVP9F5sSMtwFG1DG3byj3jDB3RhPJNJpi9S+jlcSaAD7kcGJL819e/hz+RZkU7hbe MZ7SvTaizDbzTQh3CIzpzvUhjkSo7COCjDdUsHDmnK+05b3WqQ/aC2x0u4gcUbYZwrssKmbnj bYGwxzP8R+3jOQ4Mcm+wnBurcugJlYRMCU5Lm2AuSK517lklim9iqQrPuRo0ASOP9LsJCO0lM rW4ZbvfXMu4lyHSd9s5nLRGWVw8vMAbHPwkIrZcNgE8iND3Pw3Egpknr3rZAJNDf+yPn9RJBu fBGgLu2GDCE2aCmB Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 22 September 2015 17:16:55 David Daney wrote: > From: David Daney > > The config space for external PCIe root complexes on some Cavium > ThunderX SoCs is very similar to CAM and ECAM, but differs in the > shift values that have to be applied to the bus and devfn numbers to > compose that address window offset. These root complexes also have > the interesting property that there is no root bridge, so the standard > manner of limiting scanning to only the first device doesn't work. We > can use the standard pci-host-generic driver if we make a minor > addition to handle these differences, so we... > > Add a mapping function for ThunderX PCIe root complexes with a bus > shift of 24 and devfn shift of 16. Ignore accesses for devices other > than the first device on the primary bus. > > Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt > > Signed-off-by: David Daney > Acked-by: Will Deacon > Acked-by: Arnd Bergmann