From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753934AbeE1HNy (ORCPT ); Mon, 28 May 2018 03:13:54 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:2426 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753800AbeE1HNi (ORCPT ); Mon, 28 May 2018 03:13:38 -0400 X-UUID: 0062aadd5eaf460eb85f980c3f1685a6-20180528 Message-ID: <1527491609.24367.7.camel@mtksdaap41> Subject: Re: [PATCH v4 7/9] drm/mediatek: add connection from OD1 to RDMA1 From: CK Hu To: Stu Hsieh CC: Philipp Zabel , David Airlie , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , Date: Mon, 28 May 2018 15:13:29 +0800 In-Reply-To: <1527489507-24453-8-git-send-email-stu.hsieh@mediatek.com> References: <1527489507-24453-1-git-send-email-stu.hsieh@mediatek.com> <1527489507-24453-8-git-send-email-stu.hsieh@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Stu: On Mon, 2018-05-28 at 14:38 +0800, Stu Hsieh wrote: > This patch add the connection from OD1 to RDMA1 for ext path. > Reviewed-by: CK Hu > Signed-off-by: Stu Hsieh > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 58e44349e315..8bfc0debd2c2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -75,6 +75,7 @@ > > #define OVL0_MOUT_EN_COLOR0 0x1 > #define OD_MOUT_EN_RDMA0 0x1 > +#define OD1_MOUT_EN_RDMA1 BIT(16) > #define UFOE_MOUT_EN_DSI0 0x1 > #define COLOR0_SEL_IN_OVL0 0x1 > #define OVL1_MOUT_EN_COLOR1 0x1 > @@ -151,6 +152,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > } else if (cur == DDP_COMPONENT_GAMMA && next == DDP_COMPONENT_RDMA1) { > *addr = DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN; > value = GAMMA_MOUT_EN_RDMA1; > + } else if (cur == DDP_COMPONENT_OD1 && next == DDP_COMPONENT_RDMA1) { > + *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN; > + value = OD1_MOUT_EN_RDMA1; > } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI0) { > *addr = DISP_REG_CONFIG_DISP_RDMA1_MOUT_EN; > value = RDMA1_MOUT_DPI0;