From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751807AbeFELeM (ORCPT ); Tue, 5 Jun 2018 07:34:12 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:11206 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751735AbeFELeK (ORCPT ); Tue, 5 Jun 2018 07:34:10 -0400 X-IronPort-AV: E=Sophos;i="5.49,478,1520866800"; d="scan'208";a="283089208" From: Michel Pollet To: linux-renesas-soc@vger.kernel.org, Simon Horman Cc: phil.edworthy@renesas.com, Michel Pollet , Michel Pollet , Rob Herring , Mark Rutland , Magnus Damm , Russell King , Carlo Caione , Maxime Ripard , Douglas Anderson , Kevin Hilman , Frank Rowand , Florian Fainelli , Rajendra Nayak , Chen-Yu Tsai , Stefan Wahren , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/3] dt-bindings: cpu: Add Renesas R9A06G032 SMP enable method. Date: Tue, 5 Jun 2018 12:28:46 +0100 Message-Id: <1528198148-23308-2-git-send-email-michel.pollet@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528198148-23308-1-git-send-email-michel.pollet@bp.renesas.com> References: <1528198148-23308-1-git-send-email-michel.pollet@bp.renesas.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a special enable method for second CA7 of the R9A06G032 Signed-off-by: Michel Pollet Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 29e1dc5..b395d107 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -219,6 +219,7 @@ described below. "qcom,kpss-acc-v1" "qcom,kpss-acc-v2" "renesas,apmu" + "renesas,r9a06g032-smp" "rockchip,rk3036-smp" "rockchip,rk3066-smp" "ste,dbx500-smp" -- 2.7.4