From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org by pdx-caf-mail.web.codeaurora.org (Dovecot) with LMTP id LyOWLTjsHVvfJQAAmS7hNA ; Mon, 11 Jun 2018 03:29:06 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 54C4A607A4; Mon, 11 Jun 2018 03:29:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.0 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by smtp.codeaurora.org (Postfix) with ESMTP id 95CAD60792; Mon, 11 Jun 2018 03:29:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 95CAD60792 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932617AbeFKD3E (ORCPT + 21 others); Sun, 10 Jun 2018 23:29:04 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:38127 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S932481AbeFKD1Q (ORCPT ); Sun, 10 Jun 2018 23:27:16 -0400 X-UUID: 3192cdc4a25f4de1af7406a9ea705952-20180611 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1593979645; Mon, 11 Jun 2018 11:27:11 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Mon, 11 Jun 2018 11:27:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Mon, 11 Jun 2018 11:27:09 +0800 From: Stu Hsieh To: CK Hu , Philipp Zabel CC: David Airlie , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , , Stu Hsieh Subject: [PATCH 24/28] drm/mediatek: add DSI2 support for mutex Date: Mon, 11 Jun 2018 11:26:16 +0800 Message-ID: <1528687580-549-25-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1528687580-549-1-git-send-email-stu.hsieh@mediatek.com> References: <1528687580-549-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add the DSI2 support for mutex Signed-off-by: Stu Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 5916fc11693a..1e7e3872eccc 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -77,6 +77,7 @@ #define MUTEX_SOF_DSI1 2 #define MUTEX_SOF_DPI0 3 #define MUTEX_SOF_DPI1 4 +#define MUTEX_SOF_DSI2 5 #define OVL0_MOUT_EN_COLOR0 0x1 #define OD_MOUT_EN_RDMA0 0x1 @@ -383,6 +384,9 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex, case DDP_COMPONENT_DSI1: reg = MUTEX_SOF_DSI0; break; + case DDP_COMPONENT_DSI2: + reg = MUTEX_SOF_DSI2; + break; case DDP_COMPONENT_DPI0: reg = MUTEX_SOF_DPI0; break; @@ -420,6 +424,7 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex, switch (id) { case DDP_COMPONENT_DSI0: case DDP_COMPONENT_DSI1: + case DDP_COMPONENT_DSI2: case DDP_COMPONENT_DPI0: case DDP_COMPONENT_DPI1: writel_relaxed(MUTEX_SOF_SINGLE_MODE, -- 2.12.5