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From: Fenghua Yu <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>, "H Peter Anvin" <hpa@zytor.com>
Cc: "Ashok Raj" <ashok.raj@intel.com>,
	"Alan Cox" <alan@linux.intel.com>,
	"Ravi V Shankar" <ravi.v.shankar@intel.com>,
	"linux-kernel" <linux-kernel@vger.kernel.org>,
	"x86" <x86@kernel.org>, Fenghua Yu <fenghua.yu@intel.com>
Subject: [RFC PATCH 1/8] x86/cpufeatures: Enumerate MOVDIRI instruction
Date: Fri, 15 Jun 2018 20:06:08 -0700	[thread overview]
Message-ID: <1529118375-90191-2-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1529118375-90191-1-git-send-email-fenghua.yu@intel.com>

MOVDIRI moves doubleword or quadword from register to memory through
direct store which is implemented by using write combining (WC) for
writing data directly into memory without caching the data.

Availability of the MOVDIRI instruction is indicated by the presence of
the CPUID feature flag MOVDIRI(CPUID.0x07.0x0:ECX[bit 27]).

Please check the latest Intel Architecture Instruction Set Extensions
and Future Features Programming Reference for more details on the CPUID
feature MOVDIRI flag.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 5701f5cecd31..92630c469675 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -329,6 +329,7 @@
 #define X86_FEATURE_LA57		(16*32+16) /* 5-level page tables */
 #define X86_FEATURE_RDPID		(16*32+22) /* RDPID instruction */
 #define X86_FEATURE_CLDEMOTE		(16*32+25) /* CLDEMOTE instruction */
+#define X86_FEATURE_MOVDIRI		(16*32+27) /* MOVDIRI instruction */
 
 /* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */
 #define X86_FEATURE_OVERFLOW_RECOV	(17*32+ 0) /* MCA overflow recovery support */
-- 
2.5.0


  reply	other threads:[~2018-06-16  3:07 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-16  3:06 [RFC PATCH 0/8] x86: Enable a few new instructions Fenghua Yu
2018-06-16  3:06 ` Fenghua Yu [this message]
2018-06-19  8:57   ` [RFC PATCH 1/8] x86/cpufeatures: Enumerate MOVDIRI instruction Thomas Gleixner
2018-06-19 21:36     ` Fenghua Yu
2018-06-19 22:32       ` Thomas Gleixner
2018-06-19 22:35         ` Fenghua Yu
2018-06-25 16:13       ` David Laight
2018-06-16  3:06 ` [RFC PATCH 2/8] x86/cpufeatures: Enumerate MOVDIR64B instruction Fenghua Yu
2018-06-16  3:06 ` [RFC PATCH 3/8] x86/cpufeatures: Enumerate UMONITOR, UMWAIT, and TPAUSE instructions Fenghua Yu
2018-06-16  3:06 ` [RFC PATCH 4/8] cpuidle: Set up maximum umwait time and umwait states Fenghua Yu
2018-06-19  9:03   ` Thomas Gleixner
2018-06-19 15:46     ` Fenghua Yu
2018-06-16  3:06 ` [RFC PATCH 5/8] x86/umwait.c: Add sysfs interface to show tsc_khz Fenghua Yu
2018-06-19  9:08   ` Thomas Gleixner
2018-06-19 15:11     ` Fenghua Yu
2018-06-16  3:06 ` [RFC PATCH 6/8] x86/lib_direct_store.h: Add APIs for direct store instructions Fenghua Yu
2018-06-19  8:47   ` Thomas Gleixner
2018-06-16  3:06 ` [RFC PATCH 7/8] x86/lib_user_wait.h: Add APIs for user wait instructions Fenghua Yu
2018-06-19  9:12   ` Thomas Gleixner
2018-06-19 22:27     ` Fenghua Yu
2018-06-19 22:34       ` Thomas Gleixner
2018-06-19 22:36         ` Fenghua Yu
2018-06-16  3:06 ` [RFC PATCH 8/8] selftests/x86: Self test for the APIs in lib_direct_store.h and lib_user_wait.h Fenghua Yu

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