From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AD38C43A1D for ; Thu, 12 Jul 2018 06:19:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFC0220C0C for ; Thu, 12 Jul 2018 06:19:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EFC0220C0C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732399AbeGLG1Z (ORCPT ); Thu, 12 Jul 2018 02:27:25 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:9175 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732191AbeGLG1Z (ORCPT ); Thu, 12 Jul 2018 02:27:25 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id F10276C0C5DCF; Thu, 12 Jul 2018 14:19:07 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:02 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 2/6] iommu/dma: add support for non-strict mode Date: Thu, 12 Jul 2018 14:18:28 +0800 Message-ID: <1531376312-2192-3-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1. Save the related domain pointer in struct iommu_dma_cookie, make iovad capable call domain->ops->flush_iotlb_all to flush TLB. 2. Add a new iommu capability: IOMMU_CAP_NON_STRICT, which used to indicate that the iommu domain support non-strict mode. 3. During the iommu domain initialization phase, call capable() to check whether it support non-strcit mode. If so, call init_iova_flush_queue to register iovad->flush_cb callback. 4. All unmap(contains iova-free) APIs will finally invoke __iommu_dma_unmap -->iommu_dma_free_iova. If the domain is non-strict, call queue_iova to put off iova freeing. Signed-off-by: Zhen Lei --- drivers/iommu/dma-iommu.c | 25 +++++++++++++++++++++++++ include/linux/iommu.h | 7 +++++++ 2 files changed, 32 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index ddcbbdb..9f0c77a 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -55,6 +55,7 @@ struct iommu_dma_cookie { }; struct list_head msi_page_list; spinlock_t msi_lock; + struct iommu_domain *domain_non_strict; }; static inline size_t cookie_msi_granule(struct iommu_dma_cookie *cookie) @@ -257,6 +258,17 @@ static int iova_reserve_iommu_regions(struct device *dev, return ret; } +static void iommu_dma_flush_iotlb_all(struct iova_domain *iovad) +{ + struct iommu_dma_cookie *cookie; + struct iommu_domain *domain; + + cookie = container_of(iovad, struct iommu_dma_cookie, iovad); + domain = cookie->domain_non_strict; + + domain->ops->flush_iotlb_all(domain); +} + /** * iommu_dma_init_domain - Initialise a DMA mapping domain * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() @@ -272,6 +284,7 @@ static int iova_reserve_iommu_regions(struct device *dev, int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, u64 size, struct device *dev) { + const struct iommu_ops *ops = domain->ops; struct iommu_dma_cookie *cookie = domain->iova_cookie; struct iova_domain *iovad = &cookie->iovad; unsigned long order, base_pfn, end_pfn; @@ -308,6 +321,15 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, } init_iova_domain(iovad, 1UL << order, base_pfn); + + if ((ops->capable && ops->capable(IOMMU_CAP_NON_STRICT)) && + (IOMMU_DOMAIN_STRICT_MODE(domain) == IOMMU_NON_STRICT)) { + BUG_ON(!ops->flush_iotlb_all); + + cookie->domain_non_strict = domain; + init_iova_flush_queue(iovad, iommu_dma_flush_iotlb_all, NULL); + } + if (!dev) return 0; @@ -390,6 +412,9 @@ static void iommu_dma_free_iova(struct iommu_dma_cookie *cookie, /* The MSI case is only ever cleaning up its most recent allocation */ if (cookie->type == IOMMU_DMA_MSI_COOKIE) cookie->msi_iova -= size; + else if (cookie->domain_non_strict) + queue_iova(iovad, iova_pfn(iovad, iova), + size >> iova_shift(iovad), 0); else free_iova_fast(iovad, iova_pfn(iovad, iova), size >> iova_shift(iovad)); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 19938ee..82ed979 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -86,6 +86,12 @@ struct iommu_domain_geometry { #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API) +#define IOMMU_STRICT 0 +#define IOMMU_NON_STRICT 1 +#define IOMMU_STRICT_MODE_MASK 1UL +#define IOMMU_DOMAIN_STRICT_MODE(domain) \ + (domain->type != IOMMU_DOMAIN_UNMANAGED) + struct iommu_domain { unsigned type; const struct iommu_ops *ops; @@ -101,6 +107,7 @@ enum iommu_cap { transactions */ IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ + IOMMU_CAP_NON_STRICT, /* IOMMU supports non-strict mode */ }; /* -- 1.8.3