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Wed, 01 Aug 2018 09:50:01 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1fkuJw-0004uj-RL; Wed, 01 Aug 2018 09:49:56 -0700 Received: from xsj-pvapsmtp01 (smtp.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id w71GnpIM001636; Wed, 1 Aug 2018 09:49:51 -0700 Received: from [172.23.37.224] (helo=xhdbharatku40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1fkuJq-0004rx-MG; Wed, 01 Aug 2018 09:49:51 -0700 From: Bharat Kumar Gogada To: , CC: , , Bharat Kumar Gogada Subject: [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx controller irq with AER Date: Wed, 1 Aug 2018 22:14:49 +0530 Message-ID: <1533141889-19962-4-git-send-email-bharat.kumar.gogada@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533141889-19962-1-git-send-email-bharat.kumar.gogada@xilinx.com> References: <1533141889-19962-1-git-send-email-bharat.kumar.gogada@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(39860400002)(376002)(136003)(346002)(396003)(2980300002)(438002)(199004)(189003)(106466001)(8676002)(81166006)(50226002)(5660300001)(476003)(305945005)(36756003)(126002)(478600001)(11346002)(63266004)(486006)(356003)(2616005)(2906002)(81156014)(76176011)(51416003)(4326008)(107886003)(48376002)(106002)(186003)(54906003)(7696005)(77096007)(110136005)(16586007)(446003)(9786002)(336012)(8936002)(36386004)(47776003)(316002)(26005)(50466002)(426003)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:BL0PR02MB4449;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; 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The controller has dedicated interrupt line for reporting PCIe errors along with AER. Using dedicated controller irq number for AER which is shared with misc interrupt handler in pcie-xilinx-nwl. This irq number is set using PCI quirk. Signed-off-by: Bharat Kumar Gogada --- drivers/pci/pcie/portdrv_core.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index e0261ad..fa9150e 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq) int retval; struct pcie_device *pcie; struct device *device; +#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata) + irq = *(int *)pdev->sysdata; +#endif pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); if (!pcie) -- 1.7.1