From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FD47ECE562 for ; Wed, 19 Sep 2018 07:27:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 25A3B214DA for ; Wed, 19 Sep 2018 07:27:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 25A3B214DA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731081AbeISNDp (ORCPT ); Wed, 19 Sep 2018 09:03:45 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:35693 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1730912AbeISND2 (ORCPT ); Wed, 19 Sep 2018 09:03:28 -0400 X-UUID: 8c1de88bd7c04bfeb820226f3c9b06f8-20180919 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1792613500; Wed, 19 Sep 2018 15:26:46 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 19 Sep 2018 15:26:37 +0800 Received: from mtkslt302.mediatek.inc (10.21.14.115) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 19 Sep 2018 15:26:37 +0800 From: Hsin-Hsiung Wang To: , , CC: , , , , , , , , Hsin-Hsiung Wang Subject: [PATCH 1/4] dt-bindings: mediatek: add compatible for mt8183 pwrap Date: Wed, 19 Sep 2018 15:25:58 +0800 Message-ID: <1537341961-20736-2-git-send-email-hsin-hsiung.wang@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1537341961-20736-1-git-send-email-hsin-hsiung.wang@mediatek.com> References: <1537341961-20736-1-git-send-email-hsin-hsiung.wang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds dt-binding documentation of pwrap for Mediatek MT8183 SoC Platform. Signed-off-by: Hsin-Hsiung Wang --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index f9987c3..012fe3f 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -23,6 +23,7 @@ Required properties in pwrap device node. "mediatek,mt7622-pwrap" for MT7622 SoCs "mediatek,mt8135-pwrap" for MT8135 SoCs "mediatek,mt8173-pwrap" for MT8173 SoCs + "mediatek,mt8183-pwrap" for MT8183 SoCs - interrupts: IRQ for pwrap in SOC - reg-names: Must include the following entries: "pwrap": Main registers base -- 1.9.1