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Thu, 04 Oct 2018 08:36:01 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1g85fP-00005B-T5; Thu, 04 Oct 2018 08:35:55 -0700 Received: from xsj-pvapsmtp01 (xsj-smtp.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id w94FZsog030940; Thu, 4 Oct 2018 08:35:54 -0700 Received: from [172.23.64.106] (helo=xhdvnc125.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1g85fN-0008WR-Ry; Thu, 04 Oct 2018 08:35:54 -0700 Received: by xhdvnc125.xilinx.com (Postfix, from userid 16987) id 135CF121465; Thu, 4 Oct 2018 21:05:53 +0530 (IST) From: Manish Narani To: , , , , , , , , CC: , , , Subject: [PATCH v8 03/10] edac: synopsys: Modify the comments in the driver Date: Thu, 4 Oct 2018 21:05:21 +0530 Message-ID: <1538667328-9465-4-git-send-email-manish.narani@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1538667328-9465-1-git-send-email-manish.narani@xilinx.com> References: <1538667328-9465-1-git-send-email-manish.narani@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.100;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(346002)(39860400002)(376002)(396003)(2980300002)(438002)(189003)(199004)(48376002)(2201001)(8676002)(47776003)(63266004)(103686004)(4326008)(7416002)(90966002)(6666003)(305945005)(186003)(356003)(6266002)(52956003)(26005)(316002)(50466002)(16586007)(14444005)(5660300001)(51416003)(50226002)(2616005)(81166006)(81156014)(446003)(126002)(8936002)(44832011)(42186006)(5024004)(72206003)(2906002)(476003)(426003)(106466001)(486006)(110136005)(54906003)(336012)(478600001)(11346002)(106002)(36756003)(76176011)(36386004)(107986001)(2101003)(5001870100001);DIR:OUT;SFP:1101;SCL:1;SRVR:DM6PR02MB4474;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;LANG:en;PTR:xapps1.xilinx.com,unknown-60-100.xilinx.com;MX:1;A:1; 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Update abbreviations to capital letters in the comments. Signed-off-by: Manish Narani --- drivers/edac/synopsys_edac.c | 98 ++++++++++++++++++++++---------------------- 1 file changed, 48 insertions(+), 50 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index abb5de8..7db5928 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -96,12 +96,12 @@ #define SCRUB_MODE_SECDED 0x4 /** - * struct ecc_error_info - ECC error log information - * @row: Row number - * @col: Column number - * @bank: Bank number - * @bitpos: Bit position - * @data: Data causing the error + * struct ecc_error_info - ECC error log information. + * @row: Row number. + * @col: Column number. + * @bank: Bank number. + * @bitpos: Bit position. + * @data: Data causing the error. */ struct ecc_error_info { u32 row; @@ -112,11 +112,11 @@ struct ecc_error_info { }; /** - * struct synps_ecc_status - ECC status information to report - * @ce_cnt: Correctable error count - * @ue_cnt: Uncorrectable error count - * @ceinfo: Correctable error log information - * @ueinfo: Uncorrectable error log information + * struct synps_ecc_status - ECC status information to report. + * @ce_cnt: Correctable error count. + * @ue_cnt: Uncorrectable error count. + * @ceinfo: Correctable error log information. + * @ueinfo: Uncorrectable error log information. */ struct synps_ecc_status { u32 ce_cnt; @@ -126,12 +126,12 @@ struct synps_ecc_status { }; /** - * struct synps_edac_priv - DDR memory controller private instance data - * @baseaddr: Base address of the DDR controller - * @message: Buffer for framing the event specific info - * @stat: ECC status information - * @ce_cnt: Correctable Error count - * @ue_cnt: Uncorrectable Error count + * struct synps_edac_priv - DDR memory controller private instance data. + * @baseaddr: Base address of the DDR controller. + * @message: Buffer for framing the event specific info. + * @stat: ECC status information. + * @ce_cnt: Correctable Error count. + * @ue_cnt: Uncorrectable Error count. */ struct synps_edac_priv { void __iomem *baseaddr; @@ -142,13 +142,11 @@ struct synps_edac_priv { }; /** - * edac_geterror_info - Get the current ecc error info - * @base: Pointer to the base address of the ddr memory controller - * @p: Pointer to the synopsys ecc status structure + * edac_geterror_info - Get the current ECC error info. + * @base: Base address of the DDR memory controller. + * @p: Synopsys ECC status structure. * - * Determines there is any ecc error or not - * - * Return: one if there is no error otherwise returns zero + * Return: one if there is no error otherwise returns zero. */ static int edac_geterror_info(void __iomem *base, struct synps_ecc_status *p) @@ -196,11 +194,11 @@ static int edac_geterror_info(void __iomem *base, } /** - * edac_handle_error - Handle controller error types CE and UE - * @mci: Pointer to the edac memory controller instance - * @p: Pointer to the synopsys ecc status structure + * edac_handle_error - Handle controller error types CE and UE. + * @mci: EDAC memory controller instance. + * @p: Synopsys ECC status structure. * - * Handles the controller ECC correctable and un correctable error. + * Handles the controller ECC correctable and un-correctable error. */ static void edac_handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p) @@ -232,10 +230,10 @@ static void edac_handle_error(struct mem_ctl_info *mci, } /** - * edac_check - Check controller for ECC errors - * @mci: Pointer to the edac memory controller instance + * edac_check - Check controller for ECC errors. + * @mci: EDAC memory controller instance. * - * Used to check and post ECC errors. Called by the polling thread + * Used to check and post ECC errors. Called by the polling thread. */ static void edac_check(struct mem_ctl_info *mci) { @@ -255,8 +253,8 @@ static void edac_check(struct mem_ctl_info *mci) } /** - * edac_get_dtype - Return the controller memory width - * @base: Pointer to the ddr memory controller base address + * edac_get_dtype - Return the controller memory width. + * @base: DDR memory controller base address. * * Get the EDAC device type width appropriate for the current controller * configuration. @@ -286,12 +284,12 @@ static enum dev_type edac_get_dtype(const void __iomem *base) } /** - * edac_get_eccstate - Return the controller ecc enable/disable status - * @base: Pointer to the ddr memory controller base address + * edac_get_eccstate - Return the controller ECC enable/disable status. + * @base: DDR memory controller base address. * - * Get the ECC enable/disable status for the controller + * Get the ECC enable/disable status for the controller. * - * Return: a ecc status boolean i.e true/false - enabled/disabled. + * Return: a ECC status boolean i.e true/false - enabled/disabled. */ static bool edac_get_eccstate(void __iomem *base) { @@ -311,9 +309,9 @@ static bool edac_get_eccstate(void __iomem *base) } /** - * edac_get_memsize - reads the size of the attached memory device + * edac_get_memsize - reads the size of the attached memory device. * - * Return: the memory size in bytes + * Return: the memory size in bytes. */ static u32 edac_get_memsize(void) { @@ -325,8 +323,8 @@ static u32 edac_get_memsize(void) } /** - * edac_get_mtype - Returns controller memory type - * @base: pointer to the synopsys ecc status structure + * edac_get_mtype - Returns controller memory type. + * @base: Synopsys ECC status structure. * * Get the EDAC memory type appropriate for the current controller * configuration. @@ -349,11 +347,11 @@ static enum mem_type edac_get_mtype(const void __iomem *base) } /** - * edac_init_csrows - Initialize the cs row data - * @mci: Pointer to the edac memory controller instance + * edac_init_csrows - Initialize the cs row data. + * @mci: EDAC memory controller instance. * * Initializes the chip select rows associated with the EDAC memory - * controller instance + * controller instance. * * Return: Unconditionally 0. */ @@ -383,9 +381,9 @@ static int edac_init_csrows(struct mem_ctl_info *mci) } /** - * edac_mc_init - Initialize driver instance - * @mci: Pointer to the edac memory controller instance - * @pdev: Pointer to the platform_device struct + * edac_mc_init - Initialize driver instance. + * @mci: EDAC memory controller instance. + * @pdev: platform_device struct. * * Performs initialization of the EDAC memory controller instance and * related driver-private data associated with the memory controller the @@ -424,8 +422,8 @@ static int edac_mc_init(struct mem_ctl_info *mci, } /** - * synps_edac_mc_probe - Check controller and bind driver - * @pdev: Pointer to the platform_device struct + * synps_edac_mc_probe - Check controller and bind driver. + * @pdev: platform_device struct. * * Probes a specific controller instance for binding with the driver. * @@ -496,8 +494,8 @@ static int synps_edac_mc_probe(struct platform_device *pdev) } /** - * synps_edac_mc_remove - Unbind driver from controller - * @pdev: Pointer to the platform_device struct + * synps_edac_mc_remove - Unbind driver from controller. + * @pdev: Platform_device struct. * * Return: Unconditionally 0 */ -- 2.1.1