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To:     Michael Turquette <mturquette@baylibre.com>,
        Taniya Das <tdas@codeaurora.org>
From:   Stephen Boyd <sboyd@kernel.org>
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Cc:     Andy Gross <andy.gross@linaro.org>,
        David Brown <david.brown@linaro.org>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, robh@kernel.org,
        Taniya Das <tdas@codeaurora.org>
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Message-ID: <154331006901.88331.9760589510991406736@swboyd.mtv.corp.google.com>
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Subject: Re: [PATCH v10 3/3] clk: qcom: Add lpass clock controller driver for SDM845
Date:   Tue, 27 Nov 2018 01:14:29 -0800
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Quoting Taniya Das (2018-11-21 23:53:41)
> +
> +static struct clk_branch lpass_qdsp6ss_core_clk =3D {
> +       .halt_reg =3D 0x20,
> +       /* CLK_OFF would not toggle until LPASS is not out of reset */

Is this really "CLK_OFF won't toggle until LPASS it out of reset"?