From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B7ECC43441 for ; Tue, 27 Nov 2018 10:06:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E82BE208E7 for ; Tue, 27 Nov 2018 10:06:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E82BE208E7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730535AbeK0VDm (ORCPT ); Tue, 27 Nov 2018 16:03:42 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:52303 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726437AbeK0VDm (ORCPT ); Tue, 27 Nov 2018 16:03:42 -0500 Received: from kresse.hi.pengutronix.de ([2001:67c:670:100:1d::2a]) by metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1gRaFu-0004NI-73; Tue, 27 Nov 2018 11:06:10 +0100 Message-ID: <1543313169.2507.39.camel@pengutronix.de> Subject: Re: [PATCH 3/3] PCI: imx: Add support for i.MX8MQ From: Lucas Stach To: Andrey Smirnov , Leonard Crestez Cc: Richard Zhu , linux-imx@nxp.com, Chris Healy , Dong Aisheng , linux-kernel , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Fabio Estevam , Mark Rutland , linux-arm-kernel , Bjorn Helgaas , linux-pci@vger.kernel.org Date: Tue, 27 Nov 2018 11:06:09 +0100 In-Reply-To: References: <20181117181225.10737-1-andrew.smirnov@gmail.com> <20181117181225.10737-4-andrew.smirnov@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::2a X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Andrey, Am Montag, den 26.11.2018, 10:24 -0800 schrieb Andrey Smirnov: > On Tue, Nov 20, 2018 at 2:49 AM Leonard Crestez wrote: > > > > On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote: > > > @@ -921,7 +1004,28 @@ static int imx6_pcie_probe(struct platform_device *pdev) > > > -     case IMX7D: > > > +     case IMX8MQ: > > > +             if (of_property_read_u32(node, "fsl,iomux-gpr1x", > > > +                                      &imx6_pcie->gpr1x)) { > > > +                     dev_err(dev, "Failed to get GPR1x address\n"); > > > +                     return -EINVAL; > > > +             } > > > > This is for distinguishing multiple controllers on the SOC but other > > registers and bits might differ. Isn't it preferable to have a property > > for controller id instead of adding many registers to DT? > > > > I liked encoding necessary info in DT directly slightly better than > encoding abstract ID and then decoding it further in the driver code. > OTOH, I am not really attached to that path. Lucas, can you comment on > this please? Yes, after rereading the patch with this in mind I agree that having the GPR offset on DT directly is IMO the better approach than an abstract ID. One other thing I noticed is that we probably need some property to encode if the clock is supplied by an external clkgen, or if the clock is provided by the i.MX. Hardcoding this in the driver will lead to DT backward compatibility headaches later on if someone decides to build a board with the clock provided from the i.MX. Regards, Lucas