From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B13DC43441 for ; Thu, 29 Nov 2018 16:42:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5BC22213A2 for ; Thu, 29 Nov 2018 16:42:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5BC22213A2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729704AbeK3DsK (ORCPT ); Thu, 29 Nov 2018 22:48:10 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:11859 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729508AbeK3DsJ (ORCPT ); Thu, 29 Nov 2018 22:48:09 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id wATGdXHJ010749; Thu, 29 Nov 2018 17:41:21 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2nxw02vta3-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 29 Nov 2018 17:41:21 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 43397117; Thu, 29 Nov 2018 17:40:51 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node2.st.com [10.75.127.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 15D1150FF; Thu, 29 Nov 2018 16:41:20 +0000 (GMT) Received: from localhost (10.75.127.49) by SFHDAG6NODE2.st.com (10.75.127.17) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 29 Nov 2018 17:41:19 +0100 From: Christophe Kerello To: , , , , , , , CC: , , , , Christophe Kerello Subject: [ v3 0/3] mtd: rawnand: add STM32 FMC2 NAND flash controller driver Date: Thu, 29 Nov 2018 17:41:00 +0100 Message-ID: <1543509663-26128-1-git-send-email-christophe.kerello@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG7NODE2.st.com (10.75.127.20) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-29_10:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset adds the support for the STMicroelectronics FMC2 NAND flash controller found on STM32MP SOCs. This patchset supports: - the command sequencer feature, a hardware accelerator for read/write within a page - the manual mode feature, useful for debug purpose - a maximum 8k page size - following ECC strength and step size - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4) - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ecc based on HAMMING) This patchset has been tested on Micron MT29F8G08ABACAH4 (8-bit SLC NAND) and MT29F8G16ABACAH4 (16-bit SLC NAND) Changes v3: - modify clocks property description - add NAND reg property description - stm32_fmc2_nfc inherits from nand_controller structure - rewrite stm32_fmc2_read_data/stm32_fmc2_write_data functions to handle aligned and not aligned buffers - replace uint8_t by u8 - use of NAND_ROW_ADDR_3 option Changes v2: - separate the controller structure and the NAND chip structure - remove timings description from the device tree - fix typo issues - fix kbuildrobot issues Christophe Kerello (3): dt-bindings: mtd: stm32_fmc2: add STM32 FMC2 NAND controller documentation mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver mtd: rawnand: stm32_fmc2: add manual mode .../devicetree/bindings/mtd/stm32-fmc2-nand.txt | 61 + drivers/mtd/nand/raw/Kconfig | 9 + drivers/mtd/nand/raw/Makefile | 1 + drivers/mtd/nand/raw/stm32_fmc2_nand.c | 2073 ++++++++++++++++++++ 4 files changed, 2144 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/stm32-fmc2-nand.txt create mode 100644 drivers/mtd/nand/raw/stm32_fmc2_nand.c -- 1.9.1