From: Mason Yang <masonccyang@mxic.com.tw>
To: broonie@kernel.org, marek.vasut@gmail.com,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
boris.brezillon@bootlin.com, linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Cc: juliensu@mxic.com.tw, Simon Horman <horms@verge.net.au>,
zhengxunli@mxic.com.tw, Mason Yang <masonccyang@mxic.com.tw>
Subject: [PATCH v2 2/2] dt-binding: spi: Document Renesas R-Car Gen3 RPC controller bindings
Date: Mon, 3 Dec 2018 17:18:40 +0800 [thread overview]
Message-ID: <1543828720-18345-3-git-send-email-masonccyang@mxic.com.tw> (raw)
In-Reply-To: <1543828720-18345-1-git-send-email-masonccyang@mxic.com.tw>
Document the bindings used by the Renesas R-Car Gen3 RPC SPI controller.
Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
new file mode 100644
index 0000000..c6c6d9c
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
@@ -0,0 +1,35 @@
+Renesas R-Car Gen3 RPC controller Device Tree Bindings
+------------------------------------------------------
+
+Required properties:
+- compatible: should be "renesas,r8a77995-rpc"
+- #address-cells: should be 1
+- #size-cells: should be 0
+- reg: should contain 2 entries, one for the registers and one for the direct
+ mapping area
+- reg-names: should contain "rpc_regs" and "dirmap"
+- interrupts: interrupt line connected to the RPC SPI controller
+- clock-names: should contain "clk_rpc"
+- clocks: should contain 1 entries for the module's clock
+
+Example:
+
+ rpc: spi@ee200000 {
+ compatible = "renesas,r8a77995-rpc";
+ reg = <0 0xee200000 0 0x8100>, <0 0x08000000 0 0x4000000>;
+ reg-names = "rpc_regs", "dirmap";
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ clock-names = "clk_rpc";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
--
1.9.1
next prev parent reply other threads:[~2018-12-03 9:19 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 9:18 [PATCH v2 0/2] spi: Add Renesas R-Car Gen3 RPC SPI driver Mason Yang
2018-12-03 9:18 ` [PATCH v2 1/2] spi: Add Renesas R-Car Gen3 RPC SPI controller driver Mason Yang
2018-12-04 18:43 ` Marek Vasut
[not found] ` <OF0ED3C578.141B72CA-ON4825835A.0025CA62-4825835A.002A7BDF@mxic.com.tw>
2018-12-05 9:11 ` Geert Uytterhoeven
2018-12-05 12:35 ` Marek Vasut
2018-12-05 12:49 ` Marek Vasut
2018-12-05 13:15 ` Geert Uytterhoeven
2018-12-05 13:24 ` Marek Vasut
2018-12-05 13:31 ` Geert Uytterhoeven
2018-12-05 13:34 ` Marek Vasut
[not found] ` <OFC9FB54F8.34B3A8B7-ON4825835B.00267480-4825835B.0029455C@mxic.com.tw>
2018-12-06 9:02 ` Marek Vasut
[not found] ` <OF0CE74C5C.20959BA6-ON4825835C.0026C7BC-4825835C.0028B3A4@mxic.com.tw>
2018-12-07 12:01 ` Marek Vasut
2018-12-06 9:12 ` Geert Uytterhoeven
2018-12-06 9:14 ` Marek Vasut
2018-12-05 9:06 ` Geert Uytterhoeven
[not found] ` <OFE69673FB.D4270C56-ON4825835B.001C7201-4825835B.00209DC7@mxic.com.tw>
2018-12-06 8:56 ` Marek Vasut
[not found] ` <OF62002C8B.5D0A4315-ON4825835B.0031F545-4825835B.003310A3@mxic.com.tw>
2018-12-06 9:19 ` Marek Vasut
2018-12-07 18:17 ` Sergei Shtylyov
2018-12-07 18:23 ` Marek Vasut
[not found] ` <OF1EDC1518.914B7F08-ON48258360.0022FD71-48258360.0033D3DE@mxic.com.tw>
2018-12-11 16:46 ` Sergei Shtylyov
[not found] ` <OF719DFBAE.D0F9F117-ON4825836A.0039EEA3-4825836A.003B28D8@mxic.com.tw>
2018-12-22 14:20 ` Sergei Shtylyov
2018-12-03 9:18 ` Mason Yang [this message]
2018-12-04 18:19 ` [PATCH v2 2/2] dt-binding: spi: Document Renesas R-Car Gen3 RPC controller bindings Marek Vasut
[not found] ` <OF71F19EC8.23C369C1-ON4825835A.002EB699-4825835A.002F949D@mxic.com.tw>
2018-12-05 12:53 ` Marek Vasut
2018-12-05 18:56 ` Sergei Shtylyov
2018-12-05 21:55 ` Marek Vasut
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