From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Thomas Gleixner <tglx@kernel.org>, LKML <linux-kernel@vger.kernel.org>
Cc: Ihor Solodrai <ihor.solodrai@linux.dev>,
Shrikanth Hegde <sshegde@linux.ibm.com>,
Peter Zijlstra <peterz@infradead.org>,
Michael Jeanson <mjeanson@efficios.com>
Subject: Re: [patch 1/4] sched/mmcid: Prevent live lock on task to CPU mode transition
Date: Fri, 30 Jan 2026 10:24:44 -0500 [thread overview]
Message-ID: <154690d7-9e9f-4d36-a89c-7ed1a57c42ae@efficios.com> (raw)
In-Reply-To: <20260129211557.678686545@kernel.org>
On 2026-01-29 16:20, Thomas Gleixner wrote:
> Ihor reported a BPF CI failure which turned out to be a live lock in the
> MM_CID management. The scenario is:
>
> A test program creates the 4th child, which means the MM_CID users become
It would be clearer to talk in terms of threads, e.g. "creates the 5th
thread". AFAIR threads are "siblings", so I'm not sure that the
parent/child relationship really applies here.
> more than the number of CPUs (four in this example), so it switches to per
> CPU ownership mode.
>
> At this point each live task of the program has a CID associated. Assume
> thread creation order assignment for simplicity.
>
> T0 (main thread) CID0 runs fork() and creates T4
> T1 (1st child) CID1
2nd thread and so on...
> T2 (2nd child) CID2
> T3 (3rd child) CID3
> T4 (4th child) --- not visible yet
>
> T0 sets mm_cid::percpu = true and transfers it's own CID to CPU0 where it
its
> runs on and then starts the fixup which walks through the threads to
> transfer the per task CIDs either to the CPU the task is running on or drop
> it back into the pool if the task is not on a CPU.
>
> During that T1 - T3 are free to schedule in and out before the fixup caught
> up with them. Going through all possible permutations with a python script
> revealed a few problematic cases. The most trivial one is:
>
> T1 schedules in on CPU1 and observes percpu == true, so it transfers
> it's CID to CPU1
its
>
> T1 is migrated to CPU1 and schedule in observes percpu == true, but
I think you mean "to CPU2" here.
> CPU2 does not have a CID associated and T1 transferred it's own to
its
[...]
> + *
> + * Aside of that this mechanism also ensures RT compability:
compatibility
[...]
> @@ -10596,11 +10628,13 @@ void sched_mm_cid_fork(struct task_struc
> if (!percpu)
> mm_cid_transit_to_task(current, pcp);
> else
> - mm_cid_transfer_to_cpu(current, pcp);
> + mm_cid_transit_to_cpu(current, pcp);
> }
>
> if (percpu) {
> mm_cid_fixup_tasks_to_cpus();
> + /* Clear the transition bit */
> + WRITE_ONCE(mm->mm_cid.transit, 0);
You should move this WRITE_ONCE at the end of
mm_cid_fixup_tasks_to_cpus() to keep the same pattern as for
mm_cid_fixup_cpus_to_tasks().
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com
next prev parent reply other threads:[~2026-01-30 15:24 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-29 21:20 [patch 0/4] sched/mmcid: Cure mode transition woes Thomas Gleixner
2026-01-29 21:20 ` [patch 1/4] sched/mmcid: Prevent live lock on task to CPU mode transition Thomas Gleixner
2026-01-30 15:24 ` Mathieu Desnoyers [this message]
2026-01-30 16:17 ` Thomas Gleixner
2026-01-29 21:20 ` [patch 2/4] sched/mmcid: Protect transition on weakly ordered systems Thomas Gleixner
2026-01-30 15:36 ` Mathieu Desnoyers
2026-01-30 16:16 ` Thomas Gleixner
2026-01-30 15:43 ` Mathieu Desnoyers
2026-01-30 18:50 ` Shrikanth Hegde
2026-01-30 18:58 ` Mathieu Desnoyers
2026-01-31 6:10 ` Shrikanth Hegde
2026-01-29 21:20 ` [patch 3/4] sched/mmcid: Drop per CPU CID immediately when switching to per task mode Thomas Gleixner
2026-01-30 15:38 ` Mathieu Desnoyers
2026-01-29 21:20 ` [patch 4/4] sched/mmcid: Optimize transitional CIDs when scheduling out Thomas Gleixner
2026-01-30 15:50 ` Mathieu Desnoyers
2026-01-30 16:13 ` Thomas Gleixner
2026-01-30 16:29 ` Mathieu Desnoyers
2026-01-30 0:20 ` [patch 0/4] sched/mmcid: Cure mode transition woes Ihor Solodrai
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