From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 816D4C43612 for ; Tue, 8 Jan 2019 09:39:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5468A20827 for ; Tue, 8 Jan 2019 09:39:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="LMYxkwA0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728614AbfAHJi7 (ORCPT ); Tue, 8 Jan 2019 04:38:59 -0500 Received: from esa5.hgst.iphmx.com ([216.71.153.144]:8882 "EHLO esa5.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728412AbfAHJis (ORCPT ); Tue, 8 Jan 2019 04:38:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1546940328; x=1578476328; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=EOWNqUgwtvE7+G+LcAd3R3IxmYj+WfEqytDyPfTDJSM=; b=LMYxkwA077hM2ii61B+wfu/BGUNV9MCVNlQARnHhTDhMZT7fkoyLfx1W Vo/T+MKydtwpxqZHONIRasX0cS16eGCLhSOlJ9K6idVri7ibLm99nX+06 5TzUilamSOPaC4890aVlClQgwLBe2iR7MsofZepvfCYbGbHQRYYdueakg uN7+keFtF4Zma5nentjmRLjjBAVCM0JDrlT/iOJXAdk9I9KmTZuTjiS59 I0TWqXuw1evHVEUk3HMjJ4IjiOR2b6mKtRRn648BAiHqrA8jKBHjWoqVL MQh0mcR5EjE/3DmRtFpuSvByhSly6mNpCVBlVPIXJkf3l1HGdLXmHQxb1 A==; X-IronPort-AV: E=Sophos;i="5.56,453,1539619200"; d="scan'208";a="99458413" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Jan 2019 17:38:47 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP; 08 Jan 2019 01:18:52 -0800 Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip02.wdc.com with ESMTP; 08 Jan 2019 01:38:47 -0800 From: Atish Patra To: linux-riscv@lists.infradead.org Cc: Atish Patra , Alan Kao , Albert Ou , Andreas Schwab , Anup Patel , Daniel Lezcano , Dmitriy Cherkasov , Jason Cooper , linux-kernel@vger.kernel.org, Marc Zyngier , Michael Clark , Palmer Dabbelt , =?UTF-8?q?Patrick=20St=C3=A4hlin?= , Thomas Gleixner , Zong Li Subject: [PATCH v2 6/8] RISC-V: Add required checks during clock source init Date: Tue, 8 Jan 2019 01:38:36 -0800 Message-Id: <1546940318-9752-7-git-send-email-atish.patra@wdc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1546940318-9752-1-git-send-email-atish.patra@wdc.com> References: <1546940318-9752-1-git-send-email-atish.patra@wdc.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, clocksource registration happens for an invalid cpu for non-smp kernels. This lead to kernel panic as cpu hotplug registration will fail for those cpus. Moreover, riscv_hartid_to_cpuid can return errors now. Do not proceed if hartid or cpuid is invalid. Take this opprtunity to print appropriate error strings for different failure cases. Signed-off-by: Atish Patra --- drivers/clocksource/timer-riscv.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 43189220..d9b914e9 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -95,14 +95,31 @@ static int __init riscv_timer_init_dt(struct device_node *n) struct clocksource *cs; hartid = riscv_of_processor_hartid(n); + if (hartid < 0) { + pr_warn("Not valid hartid for node [%pOF] error = [%d]\n", + n, hartid); + return hartid; + } cpuid = riscv_hartid_to_cpuid(hartid); + if (cpuid < 0) { + pr_warn("Invalid cpuid for hartid [%d]\n", hartid); + return cpuid; + } + if (cpuid != smp_processor_id()) return 0; + pr_err("%s: Registering clocksource cpuid [%d] hartid [%d]\n", + __func__, cpuid, hartid); cs = per_cpu_ptr(&riscv_clocksource, cpuid); - clocksource_register_hz(cs, riscv_timebase); + error = clocksource_register_hz(cs, riscv_timebase); + if (error) { + pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", + error, cpuid); + return error; + } sched_clock_register(riscv_sched_clock, BITS_PER_LONG, riscv_timebase); @@ -110,8 +127,8 @@ static int __init riscv_timer_init_dt(struct device_node *n) "clockevents/riscv/timer:starting", riscv_timer_starting_cpu, riscv_timer_dying_cpu); if (error) - pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", - error, cpuid); + pr_err("cpu hp setup state failed for RISCV timer [%d]\n", + error); return error; } -- 2.7.4