From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C46F8C169C4 for ; Thu, 31 Jan 2019 07:53:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ABFCC20870 for ; Thu, 31 Jan 2019 07:53:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728461AbfAaHxo (ORCPT ); Thu, 31 Jan 2019 02:53:44 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:62739 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725829AbfAaHxo (ORCPT ); Thu, 31 Jan 2019 02:53:44 -0500 X-UUID: ae5b0a36f6bf4a64b723f5e1b5941bb9-20190131 X-UUID: ae5b0a36f6bf4a64b723f5e1b5941bb9-20190131 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 593196214; Thu, 31 Jan 2019 15:53:38 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs03n1.mediatek.inc (172.21.101.181) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 31 Jan 2019 15:53:36 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 31 Jan 2019 15:53:35 +0800 From: Chaotian Jing To: Ulf Hansson CC: Matthias Brugger , Shawn Lin , Simon Horman , Chaotian Jing , Kyle Roeschley , Hongjie Fang , Harish Jenny K N , , , , , Subject: [PATCH] mmc: mmc: Fix HS setting in mmc_hs400_to_hs200() Date: Thu, 31 Jan 2019 15:53:31 +0800 Message-ID: <1548921212-5219-1-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org mmc_hs400_to_hs200() begins with the card and host in HS400 mode. Therefore, any commands sent to the card should use HS400 timing. It is incorrect to reduce frequency to 50Mhz before sending the switch command, in this case, only reduce clock frequency to 50Mhz but without host timming change, host is still in hs400 mode but clock changed from 200Mhz to 50Mhz, which makes the tuning result unsuitable and cause the switch command gets response CRC error. this patch refers to mmc_select_hs400(), make the reduce clock frequency after card timing change. Signed-off-by: Chaotian Jing --- drivers/mmc/core/mmc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index da892a5..21b811e 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1239,10 +1239,6 @@ int mmc_hs400_to_hs200(struct mmc_card *card) int err; u8 val; - /* Reduce frequency to HS */ - max_dtr = card->ext_csd.hs_max_dtr; - mmc_set_clock(host, max_dtr); - /* Switch HS400 to HS DDR */ val = EXT_CSD_TIMING_HS; err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, @@ -1253,6 +1249,10 @@ int mmc_hs400_to_hs200(struct mmc_card *card) mmc_set_timing(host, MMC_TIMING_MMC_DDR52); + /* Reduce frequency to HS */ + max_dtr = card->ext_csd.hs_max_dtr; + mmc_set_clock(host, max_dtr); + err = mmc_switch_status(card); if (err) goto out_err; -- 1.8.1.1.dirty