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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8fc7665563sm573056766b.47.2026.02.19.06.16.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Feb 2026 06:16:36 -0800 (PST) Message-ID: <15495f8a-37b0-4768-9ee1-05fd6c70034e@oss.qualcomm.com> Date: Thu, 19 Feb 2026 15:16:33 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/4] soc: qcom: ice: Add OPP-based clock scaling support for ICE To: Abhinaba Rakshit , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org References: <20260219-enable-ufs-ice-clock-scaling-v6-0-0c5245117d45@oss.qualcomm.com> <20260219-enable-ufs-ice-clock-scaling-v6-2-0c5245117d45@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260219-enable-ufs-ice-clock-scaling-v6-2-0c5245117d45@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 9fNdMKQzmAmCGT-snnJYkLK9QVdtEau7 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjE5MDEzMCBTYWx0ZWRfX0Fq2l2wewex9 zmBQtej3ju6L+h8508ixJrHx4aPm+YqEyyJE+OeyX95ouSohqzckvRkYt7APX8wS897RWiazmZh sumoJSFd5dVKWSBZygrwFPQKRaKlJzgm3NwZelI5eesbrTuIT53v9iKDt+6NIT/8TyzigN+CrtS 2fqKVAX9J03OLmwQQah26Hr8GDcHfRg7TGrrUh1Dr2pHKfkkqMrMU6l28G6Vi7EzUMMFnSa86ej IoKPU1Nppb4gRMxd2AEQQFu3JZ0BewYde492TMldGcR5dXhgnQy2cQ7FbTUs1IMzoQlnTl0r24V nCrA2Sj7OrSaS+K3GzFrGZzuUJiYjiVwi2333UessazM8/f4PdPkOIDXayiv446IL1Pd7GHvscA SgdaB6dADySdK/bv3Pugu7dwfUQ4WESS3bC5IhldMOt9+68g9v0+XxIIXehWFu7R6XtBnroPY4m 8EnkoT1WeUpW8ljedBw== X-Proofpoint-GUID: 9fNdMKQzmAmCGT-snnJYkLK9QVdtEau7 X-Authority-Analysis: v=2.4 cv=daCNHHXe c=1 sm=1 tr=0 ts=69971b47 cx=c_pps a=ULNsgckmlI/WJG3HAyAuOQ==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=jUDvDPFTW8JP9J0CQvoA:9 a=QEXdDO2ut3YA:10 a=1WsBpfsz9X-RYQiigVTh:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-19_04,2026-02-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602190130 On 2/19/26 10:39 AM, Abhinaba Rakshit wrote: > Register optional operation-points-v2 table for ICE device > during device probe. > > Introduce clock scaling API qcom_ice_scale_clk which scale ICE > core clock based on the target frequency provided and if a valid > OPP-table is registered. Use flags (if provided) to decide on > the rounding of the clock freq against OPP-table. Disable clock > scaling if OPP-table is not registered. > > When an ICE-device specific OPP table is available, use the PM OPP > framework to manage frequency scaling and maintain proper power-domain > constraints. > > Also, ensure to drop the votes in suspend to prevent power/thermal > retention. Subsequently restore the frequency in resume from > core_clk_freq which stores the last ICE core clock operating frequency. > > Signed-off-by: Abhinaba Rakshit > --- [...] > +int qcom_ice_scale_clk(struct qcom_ice *ice, unsigned long target_freq, > + unsigned int flags) If you're not going to add more flags, 'bool round_ceil' would do just fine, without introducing new custom defines [...] > + /* > + * Register the OPP table only when ICE is described as a standalone > + * device node. Older platforms place ICE inside the storage controller > + * node, so they don't need an OPP table here, as they are handled in > + * storage controller. > + */ > + if (!is_legacy_binding) { > + /* OPP table is optional */ > + err = devm_pm_opp_of_add_table(dev); > + if (err && err != -ENODEV) { > + dev_err(dev, "Invalid OPP table in Device tree\n"); > + return ERR_PTR(err); > + } > + engine->has_opp = (err == 0); > + > + if (!engine->has_opp) > + dev_info(dev, "ICE OPP table is not registered\n"); dev_warn(dev, "ICE OPP table is not registered, please update your DT") Konrad