From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BD04C169C4 for ; Fri, 8 Feb 2019 09:45:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 685F6218D9 for ; Fri, 8 Feb 2019 09:45:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726892AbfBHJpY (ORCPT ); Fri, 8 Feb 2019 04:45:24 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:42905 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725998AbfBHJpY (ORCPT ); Fri, 8 Feb 2019 04:45:24 -0500 Received: from kresse.hi.pengutronix.de ([2001:67c:670:100:1d::2a]) by metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1gs2il-0000Mm-CS; Fri, 08 Feb 2019 10:45:19 +0100 Message-ID: <1549619117.2544.85.camel@pengutronix.de> Subject: Re: [RFC v2 3/5] arm64: dts: imx8mq: Combine PCIE power domains From: Lucas Stach To: Andrey Smirnov Cc: Shawn Guo , Fabio Estevam , Chris Healy , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Fri, 08 Feb 2019 10:45:17 +0100 In-Reply-To: <20190208002941.30343-4-andrew.smirnov@gmail.com> References: <20190208002941.30343-1-andrew.smirnov@gmail.com> <20190208002941.30343-4-andrew.smirnov@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::2a X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Donnerstag, den 07.02.2019, 16:29 -0800 schrieb Andrey Smirnov: > According to NXP's FAE feedback and a comment in ATF firmware, PCIE1 > and PCIE2 power domains can't really be used independently. Due to > shared reset line both power domains have to be turned on at the same > time. Account for that quirk by combining PCIE power domains into a > single 'pgc_pcie' power domain. > > Signed-off-by: Andrey Smirnov > Cc: Shawn Guo > Cc: Fabio Estevam > Cc: Chris Healy > Cc: Lucas Stach > Cc: Leonard Crestez > Cc: "A.s. Dong" > Cc: Richard Zhu > Cc: linux-imx@nxp.com > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org Nit below, otherwise: Reviewed-by: Lucas Stach > --- >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 21 ++++++++++++++++++++- >  1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index 50436bd393ed..89babc531380 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -273,9 +273,28 @@ >   reg = ; >   }; >   > - pgc_pcie1: power-domain@1 { > + /* > +  * As per comment in ATF source code: > +  * > +  * PCIE1 and PCIE2 share the > +  * same reset signal, if we > +  * power down PCIE2, PCIE1 > +  * will be held in reset too. > +  * > +  * So instead of creating two > +  * separate power domains for > +  * PCIE1 and PCIE2. We create > +  * a link between 1 and 10 and 1 and 10 is not something that directly shows up in the DTS, so I think it could be confusing to the reader. I would just state that as "link between both" or something to that tune. > +  * use what was supposed to be > +  * domain 1 as a shared PCIE > +  * power domain powering both > +  * PCIE1 and PCIE2 at the same > +  * time > +  */ > + pgc_pcie: power-domain@1 { >   #power-domain-cells = <0>; >   reg = ; > + power-domains = <&pgc_pcie2>; >   }; >   >   pgc_otg1: power-domain@2 {