From: Wei Wang <wei.w.wang@intel.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
pbonzini@redhat.com, ak@linux.intel.com, peterz@infradead.org
Cc: kan.liang@intel.com, mingo@redhat.com, rkrcmar@redhat.com,
like.xu@intel.com, wei.w.wang@intel.com, jannh@google.com,
arei.gonglei@huawei.com, jmattson@google.com
Subject: [PATCH v5 11/12] KVM/x86: remove the common handling of the debugctl msr
Date: Thu, 14 Feb 2019 17:06:13 +0800 [thread overview]
Message-ID: <1550135174-5423-12-git-send-email-wei.w.wang@intel.com> (raw)
In-Reply-To: <1550135174-5423-1-git-send-email-wei.w.wang@intel.com>
The debugctl msr is not completely identical on AMD and Intel CPUs, for
example, FREEZE_LBRS_ON_PMI is supported by Intel CPUs only. Now, this
msr is handled separatedly in svm.c and intel_pmu.c. So remove the
common debugctl msr handling code in kvm_get/set_msr_common.
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
---
arch/x86/kvm/x86.c | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 8e663c1..729da4e 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2463,18 +2463,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return 1;
}
break;
- case MSR_IA32_DEBUGCTLMSR:
- if (!data) {
- /* We support the non-activated case already */
- break;
- } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
- /* Values other than LBR and BTF are vendor-specific,
- thus reserved and should throw a #GP */
- return 1;
- }
- vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
- __func__, data);
- break;
case 0x200 ... 0x2ff:
return kvm_mtrr_set_msr(vcpu, msr, data);
case MSR_IA32_APICBASE:
@@ -2716,7 +2704,6 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
switch (msr_info->index) {
case MSR_IA32_PLATFORM_ID:
case MSR_IA32_EBL_CR_POWERON:
- case MSR_IA32_DEBUGCTLMSR:
case MSR_IA32_LASTBRANCHFROMIP:
case MSR_IA32_LASTBRANCHTOIP:
case MSR_IA32_LASTINTFROMIP:
--
2.7.4
next prev parent reply other threads:[~2019-02-14 9:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 9:06 [PATCH v5 00/12] Guest LBR Enabling Wei Wang
2019-02-14 9:06 ` [PATCH v5 01/12] perf/x86: fix the variable type of the LBR MSRs Wei Wang
2019-02-14 9:06 ` [PATCH v5 02/12] perf/x86: add a function to get the lbr stack Wei Wang
2019-02-14 9:06 ` [PATCH v5 03/12] KVM/x86: KVM_CAP_X86_GUEST_LBR Wei Wang
2019-02-14 16:21 ` Andi Kleen
2019-02-14 9:06 ` [PATCH v5 04/12] KVM/x86: intel_pmu_lbr_enable Wei Wang
2019-02-14 9:06 ` [PATCH v5 05/12] KVM/x86/vPMU: tweak kvm_pmu_get_msr Wei Wang
2019-02-14 9:06 ` [PATCH v5 06/12] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Wei Wang
2019-02-14 9:06 ` [PATCH v5 07/12] perf/x86: no counter allocation support Wei Wang
2019-02-14 16:26 ` Andi Kleen
2019-02-15 8:49 ` Wang, Wei W
2019-02-14 9:06 ` [PATCH v5 08/12] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack Wei Wang
2019-02-14 9:06 ` [PATCH v5 09/12] perf/x86: save/restore LBR_SELECT on vCPU switching Wei Wang
2019-02-14 9:06 ` [PATCH v5 10/12] KVM/x86/lbr: lazy save the guest lbr stack Wei Wang
2019-02-15 1:49 ` Like Xu
2019-02-15 9:00 ` Wang, Wei W
2019-02-14 9:06 ` Wei Wang [this message]
2019-02-14 9:06 ` [PATCH v5 12/12] KVM/VMX/vPMU: support to report GLOBAL_STATUS_LBRS_FROZEN Wei Wang
2019-02-14 16:31 ` Andi Kleen
2019-02-15 8:56 ` Wang, Wei W
2019-02-15 13:10 ` Andi Kleen
2019-02-18 1:59 ` Wei Wang
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