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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: WIFOJWeLXSwRM14pLHIlLFK015aDWk4k6TFuyyNVBjVkufjnrcWRfrXoZ+92tWPA/MiwT43wBpTVPq+YyS6qiaZEd/+HzGqzNMGx+jiC6KNKbfR0bekI7qU8xRiPPzAOY43kkxgvirwQAB4zm2d3VZhLxdqfwTNVqgE31LUVQI+kV1fnYw75PImc/ZQxRVDX6uxK6c3pwwsEQ/6RULRlFRddmS4MsJ2ZAStOE8DxRnNh5osau5WP4WA/DTORsWoiUTM7EM35f6B6GWwo3uVbJ4mCv/xOl//ZPzC6f0a5AxBx7zUmd2A9AXFOFlFajt6kv1426VN4JcfrlDD49iQreDkx4R7VvRQ1pAUQogd00uEYdyIrt48qYVhjCXaWPrEZbvhnok2jkbKg+KymkmVmUZGwypvBJDsFtFNyp2XKkRg= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e18a302e-070d-451f-fa20-08d6936dd3e4 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Feb 2019 17:48:42.9036 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5330 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The arm pll bypass needs to propagate the rate upwards in order for the cpufreq to work. Fixes: b80522040cd3f ("clk: imx: Add clock driver for i.MX8MQ CCM") Signed-off-by: Abel Vesa Reviewed-by: Lucas Stach --- drivers/clk/imx/clk-imx8mq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index 398ab0b..57499ed 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -340,7 +340,7 @@ static int imx8mq_clocks_probe(struct platform_device *= pdev) clks[IMX8MQ_DRAM_PLL2_DIV] =3D imx_clk_divider("dram_pll2_div", "dram_pll= 2", base + 0x68, 1, 6); =20 /* PLL bypass out */ - clks[IMX8MQ_ARM_PLL_BYPASS] =3D imx_clk_mux("arm_pll_bypass", base + 0x28= , 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels)); + clks[IMX8MQ_ARM_PLL_BYPASS] =3D imx_clk_mux_flags("arm_pll_bypass", base = + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SE= T_RATE_PARENT); clks[IMX8MQ_GPU_PLL_BYPASS] =3D imx_clk_mux("gpu_pll_bypass", base + 0x18= , 14, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels)); clks[IMX8MQ_VPU_PLL_BYPASS] =3D imx_clk_mux("vpu_pll_bypass", base + 0x20= , 14, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels)); clks[IMX8MQ_AUDIO_PLL1_BYPASS] =3D imx_clk_mux("audio_pll1_bypass", base = + 0x0, 14, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels)); --=20 2.7.4