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received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: px/dJq7SQoCQga3DxQVgRRKiiMYg55GVjuInsotA7rlrkfKY8bof7c9NuJTTYBV5MJVzWqmkHWMG8gxMEHDcKJ7bbNOmryNJc/uUDbUuP0KqO0oSLKwFM0D2jcNc5YcTsRILJ+EY3NAbLiJfwrJtiemetctZP7aOSKn11mTfS+6SKMJqa7C1LX87ZCPaEMGLhFDFr+AILeKFXrjj/zqk/ac5bPOtzuRiMHs+Ge0++dThu4vqS5LrxvoIUijb0+bulNa82L0TRvk6Em6alxpP4RydxlknpJOz2ly0g9SHnIt17Jj2wn8Ar+5ctZmlPY64UB/8lPCQ8eXFsoJuRVCSm+4H5AMRlFOavl2dFQku1IBMqAuewWxaioYluqjFQp4NZrGkgCSI4ke6isRZObvqZKoPosSDevipfpNrem5lf7U= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 6d01777b-3472-4c83-6083-08d696524480 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Feb 2019 10:08:57.3420 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR11MB1831 X-OriginatorOrg: microchip.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Claudiu Beznea Add support for SAM9X60's PWM controller. Signed-off-by: Claudiu Beznea --- drivers/pwm/pwm-atmel.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 647d063562db..229cedb02770 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -52,6 +52,8 @@ =20 /* Only the LSB 16 bits are significant. */ #define PWM_MAXV1_PRD 0xFFFF +/* All 32 bits are significant. */ +#define PWM_MAXV2_PRD 0xFFFFFFFF #define PRD_MAXV1_PRES 10 =20 struct atmel_pwm_registers { @@ -311,6 +313,20 @@ static const struct atmel_pwm_data atmel_pwm_data_v2 = =3D { }, }; =20 +static const struct atmel_pwm_data atmel_pwm_data_v3 =3D { + .regs =3D { + .period =3D PWMV1_CPRD, + .period_upd =3D PWMV1_CUPD, + .duty =3D PWMV1_CDTY, + .duty_upd =3D PWMV1_CUPD, + }, + .cfg =3D { + /* 32 bits to keep period and duty. */ + .max_period =3D PWM_MAXV2_PRD, + .max_pres =3D PRD_MAXV1_PRES, + }, +}; + static const struct platform_device_id atmel_pwm_devtypes[] =3D { { .name =3D "at91sam9rl-pwm", @@ -335,6 +351,9 @@ static const struct of_device_id atmel_pwm_dt_ids[] =3D= { .compatible =3D "atmel,sama5d2-pwm", .data =3D &atmel_pwm_data_v2, }, { + .compatible =3D "microchip,sam9x60-pwm", + .data =3D &atmel_pwm_data_v3, + }, { /* sentinel */ }, }; --=20 2.7.4