From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8111BC43381 for ; Wed, 6 Mar 2019 09:51:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5982820661 for ; Wed, 6 Mar 2019 09:51:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729940AbfCFJu5 (ORCPT ); Wed, 6 Mar 2019 04:50:57 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:32967 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729905AbfCFJuz (ORCPT ); Wed, 6 Mar 2019 04:50:55 -0500 X-UUID: 566240648c6b47f5a0a0f6a925352b21-20190306 X-UUID: 566240648c6b47f5a0a0f6a925352b21-20190306 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 64734217; Wed, 06 Mar 2019 17:50:39 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 6 Mar 2019 17:50:38 +0800 Received: from mtkslt302.mediatek.inc (10.21.14.115) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 6 Mar 2019 17:50:38 +0800 From: Bibby Hsieh To: Jassi Brar , Matthias Brugger , Rob Herring , CK HU CC: Daniel Kurtz , Sascha Hauer , , , , , , Sascha Hauer , Philipp Zabel , Nicolas Boichat , Bibby Hsieh , YT Shen , Daoyuan Huang , Jiaguang Zhang , Dennis-YC Hsieh , Houlong Wei , , , Frederic Chen Subject: [PATCH v2 09/10] soc: mediatek: cmdq: add cmdq_dev_get_subsys function Date: Wed, 6 Mar 2019 17:50:34 +0800 Message-ID: <1551865835-50974-10-git-send-email-bibby.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1551865835-50974-1-git-send-email-bibby.hsieh@mediatek.com> References: <1551865835-50974-1-git-send-email-bibby.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 0339FA3E0697B5AC9FCBD590B6EB3B6CAB800BEDB065A04D5FD9D286EC7D6D9F2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GCE cannot know the register base address, this function can help cmdq client to get the relationship of subsys and register base address. Signed-off-by: Bibby Hsieh --- drivers/soc/mediatek/mtk-cmdq-helper.c | 24 ++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 17 +++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 71c167c..0a9609e 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -47,6 +47,30 @@ static void cmdq_pkt_instr_encoder(struct cmdq_pkt *pkt, s16 arg_c, s16 arg_b, pkt->cmd_buf_size += CMDQ_INST_SIZE; } +struct cmdq_subsys *cmdq_dev_get_subsys(struct device *dev, int idx) +{ + struct cmdq_subsys *subsys; + struct of_phandle_args spec; + + subsys = devm_kzalloc(dev, sizeof(*subsys), GFP_KERNEL); + if (!subsys) + return NULL; + + if (of_parse_phandle_with_args(dev->of_node, "mediatek,gce-subsys", + "#subsys-cells", idx, &spec)) { + dev_err(dev, "can't parse gce-subsys property"); + + return -ENODEV; + } + + subsys->base = spec.args[0]; + subsys->id = spec.args[1]; + of_node_put(spec.np); + + return subsys; +} +EXPORT_SYMBOL(cmdq_dev_get_subsys); + static void cmdq_client_timeout(struct timer_list *t) { struct cmdq_client *client = from_timer(client, t, timer); diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 0651a0b..e39ba1e 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -15,6 +15,11 @@ struct cmdq_pkt; +struct cmdq_subsys { + u32 base; + u8 id; +}; + struct cmdq_client { spinlock_t lock; u32 pkt_cnt; @@ -142,4 +147,16 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, */ int cmdq_pkt_flush(struct cmdq_pkt *pkt); +/** + * cmdq_dev_get_subsys() - parse sub system from the device node of CMDQ client + * @dev: device of CMDQ mailbox client + * @idx: the index of desired subsys + * + * Return: CMDQ subsys pointer + * + * Help CMDQ client pasing the sub system number + * from the device node of CMDQ client. + */ +struct cmdq_subsys *cmdq_dev_get_subsys(struct device *dev, int idx); + #endif /* __MTK_CMDQ_H__ */ -- 1.9.1