From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <adrian.hunter@intel.com>, <ulf.hansson@linaro.org>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>,
<riteshh@codeaurora.org>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<anrao@nvidia.com>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH V2 08/10] mmc: cqhci: add CQHCI_SSC1 register CBC field mask
Date: Mon, 11 Mar 2019 11:02:37 -0700 [thread overview]
Message-ID: <1552327359-8036-8-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1552327359-8036-1-git-send-email-skomatineni@nvidia.com>
This patch adds define for CBC field mask of the register
CQHCI_SSC1.
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/mmc/host/cqhci.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index 981158da3326..9fb2bb638884 100644
--- a/drivers/mmc/host/cqhci.h
+++ b/drivers/mmc/host/cqhci.h
@@ -88,6 +88,7 @@
/* send status config 1 */
#define CQHCI_SSC1 0x40
+#define CQHCI_SSC1_CBC_MASK GENMASK(19, 16)
/* send status config 2 */
#define CQHCI_SSC2 0x44
--
2.7.4
next prev parent reply other threads:[~2019-03-11 18:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-11 18:02 [PATCH V2 01/10] mmc: tegra: fix ddr signaling for non-ddr modes Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 02/10] mmc: sdhci: allow host to specify maximum tuning loops Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 03/10] mmc: tegra: update hw tuning process Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 04/10] dt-bindings: mmc: tegra: document Tegra194 compatible string Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 05/10] arm64: tegra: fix default tap and trim values Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 06/10] mmc: cqhci: allow hosts to specify dcmd cmd timing parameter Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 07/10] mmc: tegra: add Tegra186 WAR for CQE Sowjanya Komatineni
2019-03-11 18:02 ` Sowjanya Komatineni [this message]
2019-03-11 18:02 ` [PATCH V2 09/10] mmc: tegra: fix CQE enable and resume sequences Sowjanya Komatineni
2019-03-11 18:02 ` [PATCH V2 10/10] arm64: tegra: enable command queue for tegra186 sdmmc4 Sowjanya Komatineni
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