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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: zn1MnoEthL4ImsKFUXH/FlVG00RNcgN99LLeCZGPJqIBZF90pjYKR4zru2WPlgUIqbVqLVcfYiK26xaas1nmX4gj0HBJ5026n7rIb3X9anuNJ6jRq1GPX6LgahkWSHXICMQ+S918vKYYFk5yqxTaLqNCmlNLw54TLy6XRcvPwCnQoKqC0SFPPyV89v3HZstGf13aIqoT4NiFtdxn/MkPCmJrM9WBVhgOzsxyhA3Tm2DuMBC3lBQt6FiaWn+WDv4opwFVJVIsZvafRhroLg/HoQcbx3+aW5rIU3IepvtaMMxVMMVLk5UfuGJaqkllFNlv2bFha5/Ox2u9ErvY6QEmh5lJxuguN05AQPniNqH8VIEs2iVlQFmtJkaBCNL1InK9FOo2IT0J3Aphgr+fAeR8J3pQvMhvPPioKjHGO8F4YwU= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 445192cc-3329-4b5e-e706-08d6ad57479e X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Mar 2019 17:12:49.8192 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6465 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The clock is registered later then these two re-parentings Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx6q.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index 708e7c5..c7b671e 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base) clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL], clk[IMX6QDL_CLK_PLL3_USB_OTG]); =20 - /* - * Handshake with mmdc_ch1 module must be masked when changing - * periph2_clk_sel. - */ - clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]); - /* Disable pll3_sw_clk by selecting the bypass clock source */ reg =3D readl_relaxed(ccm_base + CCM_CCSR); reg |=3D CCSR_PLL3_SW_CLK_SEL; @@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base) reg =3D readl_relaxed(ccm_base + CCM_CCSR); reg &=3D ~CCSR_PLL3_SW_CLK_SEL; writel_relaxed(reg, ccm_base + CCM_CCSR); - - clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]); } =20 /* --=20 2.7.4