From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,T_DKIMWL_WL_HIGH,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4407CC04A6B for ; Mon, 6 May 2019 11:58:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0910320830 for ; Mon, 6 May 2019 11:58:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="dTlm8se5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726156AbfEFL6h (ORCPT ); Mon, 6 May 2019 07:58:37 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:18880 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725827AbfEFL6g (ORCPT ); Mon, 6 May 2019 07:58:36 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 06 May 2019 04:58:41 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 06 May 2019 04:58:34 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 06 May 2019 04:58:34 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 6 May 2019 11:58:34 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 6 May 2019 11:58:34 +0000 Received: from linux.nvidia.com (Not Verified[10.24.34.185]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Mon, 06 May 2019 04:58:33 -0700 From: Sameer Pujar To: , , , CC: , , , Sameer Pujar Subject: [PATCH 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes Date: Mon, 6 May 2019 17:28:27 +0530 Message-ID: <1557143908-5850-1-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1557143921; bh=iEl3bweIliucr2ZYq6qkgeGG+bz2hS15qxHGGPsi6WA=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:Content-Type; b=dTlm8se5G86M+S6X3D4OdUWy4GDwFRxo4XBhRuGcAAnY8Y30sJ21WCsO2VtsVOmef ptWutsbbhZ/HZcNyZvQ+IgUoi1t4dJ2AYrJR1C06/1WZRudOo1zKtbTTZsiHcJjFqv 2lxmNdIpQ+dZCqeJA+WP+xMvS+MaxHS2GeE0mNKt/prP4e0Zprzn9MEVZeLqPbWJzG x/XPe9rVAu7/6wTm8OP6SjScUxjY9mzHD8Gw2r1Jj8vFWXy8wPXyXAWQwfsLFXabVX 9CoxIPz3/GtCGU5u8oVzVdHXdUEtg2H+Gx8NlTBgEktbbm3/j7oWYU+nXx7vQUAZ3+ IzniDFqmE19Jw== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT nodes for following devices on Tegra186 and Tegra194 * ACONNECT * ADMA * AGIC Signed-off-by: Sameer Pujar --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 67 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 67 ++++++++++++++++++++++++++++++++ 2 files changed, 134 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 6e2b6ce..2c432c9 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1153,4 +1153,71 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; }; + + aconnect@2a41000 { + compatible = "nvidia,tegra210-aconnect"; + clocks = <&bpmp TEGRA186_CLK_APE>, + <&bpmp TEGRA186_CLK_APB2APE>; + clock-names = "ape", "apb2ape"; + power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + dma@2930000 { + compatible = "nvidia,tegra186-adma"; + reg = <0x0 0x02930000 0x0 0x50000>; + interrupt-parent = <&agic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + clocks = <&bpmp TEGRA186_CLK_AHUB>; + clock-names = "d_audio"; + status = "disabled"; + }; + + agic: agic@2a41000 { + compatible = "nvidia,tegra210-agic"; + #interrupt-cells = <4>; + interrupt-controller; + reg = <0x0 0x02a41000 0x0 0x1000>, + <0x0 0x02a42000 0x0 0x1000>; + interrupts = ; + clocks = <&bpmp TEGRA186_CLK_APE>; + clock-names = "clk"; + status = "disabled"; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index c77ca21..dcab504 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1054,4 +1054,71 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; }; + + aconnect@2a41000 { + compatible = "nvidia,tegra210-aconnect"; + clocks = <&bpmp TEGRA194_CLK_APE>, + <&bpmp TEGRA194_CLK_APB2APE>; + clock-names = "ape", "apb2ape"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_AUD>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + dma@2930000 { + compatible = "nvidia,tegra186-adma"; + reg = <0x0 0x02930000 0x0 0x50000>; + interrupt-parent = <&agic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + clocks = <&bpmp TEGRA194_CLK_AHUB>; + clock-names = "d_audio"; + status = "disabled"; + }; + + agic: agic@2a41000 { + compatible = "nvidia,tegra210-agic"; + #interrupt-cells = <4>; + interrupt-controller; + reg = <0x0 0x02a41000 0x0 0x1000>, + <0x0 0x02a42000 0x0 0x1000>; + interrupts = ; + clocks = <&bpmp TEGRA194_CLK_APE>; + clock-names = "clk"; + status = "disabled"; + }; + }; }; -- 2.7.4