From: CK Hu <ck.hu@mediatek.com>
To: Jitao Shi <jitao.shi@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
"Mark Rutland" <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>, <linux-pwm@vger.kernel.org>,
David Airlie <airlied@linux.ie>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
Thierry Reding <treding@nvidia.com>,
"Ajay Kumar" <ajaykumar.rs@samsung.com>,
Inki Dae <inki.dae@samsung.com>,
"Rahul Sharma" <rahul.sharma@samsung.com>,
Sean Paul <seanpaul@chromium.org>,
Vincent Palatin <vpalatin@chromium.org>,
Andy Yan <andy.yan@rock-chips.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Russell King" <rmk+kernel@arm.linux.org.uk>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>,
Sascha Hauer <kernel@pengutronix.de>, <yingjoe.chen@mediatek.com>,
<eddie.huang@mediatek.com>, <cawa.cheng@mediatek.com>,
<bibby.hsieh@mediatek.com>, <stonea168@163.com>
Subject: Re: [v3 3/7] drm/mediatek: add dsi reg commit disable control
Date: Fri, 31 May 2019 11:38:28 +0800 [thread overview]
Message-ID: <1559273908.9102.2.camel@mtksdaap41> (raw)
In-Reply-To: <20190519092537.69053-4-jitao.shi@mediatek.com>
Hi, Jitao:
On Sun, 2019-05-19 at 17:25 +0800, Jitao Shi wrote:
> New DSI IP has shadow register and working reg. The register
> values are writen to shadow register. And then trigger with
> commit reg, the register values will be moved working register.
>
> This fucntion is defualt on. But this driver doesn't use this
> function. So add the disable control.
>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index a48db056df6c..fd367985c7fd 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -131,6 +131,10 @@
> #define VM_CMD_EN BIT(0)
> #define TS_VFP_EN BIT(5)
>
> +#define DSI_SHADOW_DEBUG 0x190U
> +#define FORCE_COMMIT BIT(0)
> +#define BYPASS_SHADOW BIT(1)
One more 'tab' for bitwise definition.
Regards,
CK
> +
> #define CONFIG (0xff << 0)
> #define SHORT_PACKET 0
> #define LONG_PACKET 2
> @@ -157,6 +161,7 @@ struct phy;
>
> struct mtk_dsi_driver_data {
> const u32 reg_cmdq_off;
> + bool has_shadow_ctl;
> };
>
> struct mtk_dsi {
> @@ -594,6 +599,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
> }
>
> mtk_dsi_enable(dsi);
> +
> + if (dsi->driver_data->has_shadow_ctl)
> + writel(FORCE_COMMIT | BYPASS_SHADOW,
> + dsi->regs + DSI_SHADOW_DEBUG);
> +
> mtk_dsi_reset_engine(dsi);
> mtk_dsi_phy_timconfig(dsi);
>
next prev parent reply other threads:[~2019-05-31 3:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20190519092537.69053-1-jitao.shi@mediatek.com>
[not found] ` <20190519092537.69053-7-jitao.shi@mediatek.com>
2019-05-19 19:29 ` [v3 6/7] drm/mediatek: change the dsi phytiming calculate method kbuild test robot
2019-05-30 20:45 ` Ryan Case
2019-06-03 18:14 ` Guenter Roeck
[not found] ` <20190519092537.69053-2-jitao.shi@mediatek.com>
2019-05-20 7:18 ` [v3 1/7] drm/mediatek: move mipi_dsi_host_register to probe CK Hu
2019-05-29 4:19 ` Hsin-Yi Wang
[not found] ` <20190519092537.69053-4-jitao.shi@mediatek.com>
2019-05-31 3:38 ` CK Hu [this message]
[not found] ` <20190519092537.69053-8-jitao.shi@mediatek.com>
2019-05-31 3:40 ` [v3 7/7] drm: mediatek: adjust dsi and mipi_tx probe sequence CK Hu
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