From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67626C282CE for ; Tue, 4 Jun 2019 10:12:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 36D0324C4B for ; Tue, 4 Jun 2019 10:12:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727409AbfFDKMb (ORCPT ); Tue, 4 Jun 2019 06:12:31 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:41375 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727366AbfFDKM0 (ORCPT ); Tue, 4 Jun 2019 06:12:26 -0400 X-UUID: 19a63ab428de403bad2a9c4f79da7b88-20190604 X-UUID: 19a63ab428de403bad2a9c4f79da7b88-20190604 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1763951134; Tue, 04 Jun 2019 18:12:00 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 4 Jun 2019 18:11:59 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 4 Jun 2019 18:11:59 +0800 From: Stu Hsieh To: Mauro Carvalho Chehab , Rob Herring , CK Hu CC: Mark Rutland , Matthias Brugger , Stu Hsieh , , , , , , Subject: [PATCH v4 02/14] dt-bindings: media: Add mipicsi common node binding for MT2712 MIPI-CSI2 Date: Tue, 4 Jun 2019 18:11:43 +0800 Message-ID: <1559643115-15124-3-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1559643115-15124-1-git-send-email-stu.hsieh@mediatek.com> References: <1559643115-15124-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add mipicsi common node binding for MT2712 MIPI-CSI2 Signed-off-by: Stu Hsieh --- .../media/mediatek-mipicsi-common.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-mipicsi-common.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-mipicsi-common.txt b/Documentation/devicetree/bindings/media/mediatek-mipicsi-common.txt new file mode 100644 index 000000000000..a67c744b75f0 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-mipicsi-common.txt @@ -0,0 +1,19 @@ +* Mediatek MIPI-CSI2 receiver common + +Mediatek MIPI-CSI2 receiver is the MIPI Signal capture hardware present in Mediatek SoCs + +Required properties: +- compatible: should be "mediatek,mt2712-mipicsi-common" +- reg : physical base address of the mipicsi receiver registers and length of + memory mapped region. +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. + + +Example: + mipicsi: mipicsi@15002000 { + compatible = "mediatek,mt2712-mipicsi-common", "syscon"; + reg = <0 0x15002000 0 0x10>; + clocks = <&imgsys CLK_IMG_SENINF_CAM_EN>, + <&imgsys CLK_IMG_SENINF_SCAM_EN>; + }; -- 2.18.0