Re: [PATCH v4 2/6] drm/verisilicon: add register-level macros for DC8000

[Icenowy Zheng <zhengxingda@iscas.ac.cn>]

在 2026-06-15一的 14:49 +0800，Joey Lu写道：
> Add register-level constants needed by the forthcoming DC8000
> (DCUltraLite)
> hardware ops:
> 
>   VSDC_DISP_IRQ_VSYNC(n) in vs_crtc_regs.h: bit mask for per-output
>   VSYNC interrupt bits in DISP_IRQ_STA (0x147C) / DISP_IRQ_EN
> (0x1480),
>   which are the IRQ registers used by DCUltraLite in place of the
> DC8200
>   TOP_IRQ_ACK / TOP_IRQ_EN registers.
> 
>   VSDC_FB_CONFIG_ENABLE (bit 0), VSDC_FB_CONFIG_VALID (bit 3) and
>   VSDC_FB_CONFIG_RESET (bit 4) in vs_primary_plane_regs.h: control
> bits
>   in the FB_CONFIG register used by DCUltraLite for framebuffer
> enable
>   and per-frame commit handshake.

Validated against DC8000 register list.

Reviewed-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>

> 
> No behaviour change for existing DC8200 platforms.
> 
> Signed-off-by: Joey Lu <a0987203069@gmail.com>
> ---
>  drivers/gpu/drm/verisilicon/vs_crtc_regs.h          | 1 +
>  drivers/gpu/drm/verisilicon/vs_primary_plane_regs.h | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/verisilicon/vs_crtc_regs.h
> b/drivers/gpu/drm/verisilicon/vs_crtc_regs.h
> index c7930e817635..d4da22b08cd5 100644
> --- a/drivers/gpu/drm/verisilicon/vs_crtc_regs.h
> +++ b/drivers/gpu/drm/verisilicon/vs_crtc_regs.h
> @@ -54,6 +54,7 @@
>  #define VSDC_DISP_GAMMA_DATA(n)			(0x1460 +
> 0x4 * (n))
>  
>  #define VSDC_DISP_IRQ_STA			0x147C
> +#define VSDC_DISP_IRQ_VSYNC(n)			BIT(n)
>  
>  #define VSDC_DISP_IRQ_EN			0x1480
>  
> diff --git a/drivers/gpu/drm/verisilicon/vs_primary_plane_regs.h
> b/drivers/gpu/drm/verisilicon/vs_primary_plane_regs.h
> index cbb125c46b39..67d4b00f294e 100644
> --- a/drivers/gpu/drm/verisilicon/vs_primary_plane_regs.h
> +++ b/drivers/gpu/drm/verisilicon/vs_primary_plane_regs.h
> @@ -16,6 +16,9 @@
>  #define VSDC_FB_STRIDE(n)			(0x1408 + 0x4 * (n))
>  
>  #define VSDC_FB_CONFIG(n)			(0x1518 + 0x4 * (n))
> +#define VSDC_FB_CONFIG_ENABLE			BIT(0)
> +#define VSDC_FB_CONFIG_VALID			BIT(3)
> +#define VSDC_FB_CONFIG_RESET			BIT(4)
>  #define VSDC_FB_CONFIG_CLEAR_EN			BIT(8)
>  #define VSDC_FB_CONFIG_ROT_MASK			GENMASK(13,
> 11)
>  #define VSDC_FB_CONFIG_ROT(v)			((v) << 11)