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[193.116.92.108]) by smtp.gmail.com with ESMTPSA id x5sm885939pjp.21.2019.06.19.00.16.03 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 19 Jun 2019 00:16:04 -0700 (PDT) Date: Wed, 19 Jun 2019 17:10:52 +1000 From: Nicholas Piggin Subject: Re: [PATCH 4/7] powerpc/ftrace: Additionally nop out the preceding mflr with -mprofile-kernel To: Masami Hiramatsu , Ingo Molnar , Michael Ellerman , "Naveen N. Rao" , Steven Rostedt Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org References: <72492bc769cd6f40a536e689fc3195570d07fd5c.1560868106.git.naveen.n.rao@linux.vnet.ibm.com> <877e9idum7.fsf@concordia.ellerman.id.au> In-Reply-To: <877e9idum7.fsf@concordia.ellerman.id.au> MIME-Version: 1.0 User-Agent: astroid/0.14.0 (https://github.com/astroidmail/astroid) Message-Id: <1560927184.kqsg9x9bd1.astroid@bobo.none> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Michael Ellerman's on June 19, 2019 3:14 pm: > Hi Naveen, >=20 > Sorry I meant to reply to this earlier .. :/ >=20 > "Naveen N. Rao" writes: >> With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to >> enable function tracing and profiling. So far, with dynamic ftrace, we >> used to only patch out the branch to _mcount(). However, mflr is >> executed by the branch unit that can only execute one per cycle on >> POWER9 and shared with branches, so it would be nice to avoid it where >> possible. >> >> We cannot simply nop out the mflr either. When enabling function >> tracing, there can be a race if tracing is enabled when some thread was >> interrupted after executing a nop'ed out mflr. In this case, the thread >> would execute the now-patched-in branch to _mcount() without having >> executed the preceding mflr. >> >> To solve this, we now enable function tracing in 2 steps: patch in the >> mflr instruction, use synchronize_rcu_tasks() to ensure all existing >> threads make progress, and then patch in the branch to _mcount(). We >> override ftrace_replace_code() with a powerpc64 variant for this >> purpose. >=20 > According to the ISA we're not allowed to patch mflr at runtime. See the > section on "CMODX". According to "quasi patch class" engineering note, we can patch anything with a preferred nop. But that's written as an optional facility, which we don't have a feature to test for. >=20 > I'm also not convinced the ordering between the two patches is > guaranteed by the ISA, given that there's possibly no isync on the other > CPU. Will they go through a context synchronizing event? synchronize_rcu_tasks() should ensure a thread is scheduled away, but I'm not actually sure it guarantees CSI if it's kernel->kernel. Could do a smp_call_function to do the isync on each CPU to be sure. Thanks, Nick =