From: Paul Mackerras <paulus@samba.org>
To: Linus Torvalds <torvalds@transmeta.com>
Cc: <linux-kernel@vger.kernel.org>, Patrick Mochel <mochel@osdl.org>,
Subject:Re:2.5.20@samba.org, -@samba.org, Xircom@samba.org,
PCI@samba.org, Cardbus@samba.org, doesn't@samba.org,
work@samba.org
Date: Sat, 15 Jun 2002 12:42:08 +1000 (EST) [thread overview]
Message-ID: <15626.43392.825029.986506@argo.ozlabs.ibm.com> (raw)
In-Reply-To: <Pine.LNX.4.44.0206141134210.872-100000@home.transmeta.com>
Linus Torvalds writes:
> > Unknown bridge resource 0: assuming transparent
> > Unknown bridge resource 1: assuming transparent
> > Unknown bridge resource 2: assuming transparent
>
> This is the problem.
BTW, this "assuming transparent" bit continually causes us problems on
RS/6000 machines that have a PCI-PCI bus. If none of the cards behind
the bridge have any I/O resources, the firmware will set up the bridge
with the I/O window closed, by setting the base register to one more
than the limit register, which is correct according to the Intel
document describing PCI-PCI bridges.
Then the bridge probing code comes along and says "assuming
transparent", which is wrong. The aperture is closed and the bridge
should have no I/O space resource.
I would really like the relevant code in pci_read_bridge_bases to look
like this:
if ((base || limit) && base <= limit) {
res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
res->start = base;
res->end = limit + 0xfff;
res->name = child->name;
} else if (base == limit + 0x1000) {
/* Firmware/BIOS has deactivated this window */
res->start = res->end = 0;
res->flags = 0;
printk(KERN_ERR "Bridge %s resource %d was deactivated by"
" firmware\n", dev->slot_name, 0);
} else {
/*
* Ugh. We don't know enough about this bridge. Just assume
* that it's entirely transparent.
*/
printk(KERN_ERR "Unknown bridge resource %d: assuming transparent\n", 0);
child->resource[0] = child->parent->resource[0];
}
The (base || limit) part instead of just testing base is needed
because we sometimes get PCI-PCI bridges that are legitimately set up
with the bridge having an aperture starting at I/O address 0.
IIRC someone told me that we had to do the "assuming transparent" bit
because of buggy PCI-PCI bridges used on some PCs. Can anyone
enlighten me on the details of that?
Paul.
next prev parent reply other threads:[~2002-06-15 2:44 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-06-03 11:07 2.5.20 - Xircom PCI Cardbus doesn't work Alessandro Suardi
2002-06-06 17:08 ` Peter Osterlund
2002-06-09 9:17 ` Tobias Diedrich
2002-06-09 10:55 ` Peter Osterlund
2002-06-10 15:44 ` Patrick Mochel
2002-06-10 19:28 ` Peter Osterlund
2002-06-14 16:33 ` Linus Torvalds
2002-06-14 17:20 ` Peter Osterlund
2002-06-14 17:47 ` Linus Torvalds
2002-06-14 17:53 ` Vojtech Pavlik
2002-06-14 18:05 ` Linus Torvalds
2002-06-14 18:12 ` Kai Germaschewski
2002-06-14 18:18 ` Linus Torvalds
2002-06-14 19:37 ` Jeff Garzik
2002-06-15 18:48 ` Linus Torvalds
2002-06-15 19:05 ` Linus Torvalds
2002-06-15 19:39 ` Kai Germaschewski
2002-06-15 19:58 ` Jeff Garzik
2002-06-15 23:00 ` Kai Germaschewski
2002-06-15 20:07 ` Jeff Garzik
2002-06-15 22:51 ` Kai Germaschewski
2002-06-14 19:31 ` Jeff Garzik
2002-06-14 23:25 ` Kai Germaschewski
2002-06-14 23:53 ` Jeff Garzik
2002-06-15 8:25 ` Ingo Oeser
2002-06-14 19:34 ` Jeff Garzik
2002-06-14 18:30 ` Peter Osterlund
2002-06-14 18:51 ` Linus Torvalds
2002-06-14 20:07 ` Peter Osterlund
2002-06-15 2:42 ` Paul Mackerras [this message]
2002-06-15 21:58 ` Cardbus Linus Torvalds
2002-06-16 7:01 ` Cardbus Eric W. Biederman
2002-06-16 8:18 ` Cardbus Paul Mackerras
2002-06-10 20:59 ` 2.5.20 - Xircom PCI Cardbus doesn't work Alessandro Suardi
2002-06-16 4:57 ` Linus Torvalds
2002-06-16 7:40 ` Peter Osterlund
2002-06-16 18:16 ` Linus Torvalds
2002-06-16 18:42 ` Martin Dalecki
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