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MIME-Version: 1.0 Content-Type: text/plain X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 291d501a-56fa-4880-38be-08d71ece7f79 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(2017052603328);SRVR:AM6PR07MB3877; X-MS-TrafficTypeDiagnostic: AM6PR07MB3877: X-MS-Exchange-PUrlCount: 1 X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-Forefront-PRVS: 012792EC17 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: 0EzX+QUFteV6fDa9VZ7KKl4o6HuEAJOWj7cd7tBumoL4D+5vZTELOx+8Q/pNCxiabzqwJ2DuxFxeIl6YSFkhFLuVETzJtfp0xWDVTVmD4egb47c3skaKKKAuNPHWFOIeJWN5w40aw4ToWZpOjm5aEaZsN+3JOqxSLbHlMvFSnVCiTXzSDZbpVWzEQNDr6umPDnbWtQY7ovRHcFGq02Cv3o/9cyqpGr6TpgrYkz5+9+Iy7Xq26W/RRPQh3BLryxkosxcck8K9dTt4N3Qlfn/01MoeGtYagOdfHjwBXXugpanYll/qO9hMMh0pJsWH8NR0NKzlup2wLpQSTkYIyD8hZyalvhP8heyopGdRIjf8u0cQUAI1IW6PpnoGLB+RmAi8nmKgHxEna8AWMuXMiVps7juS844e9J53a3E656RrqCM= X-OriginatorOrg: nokia-sbell.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2019 02:40:54.5270 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 291d501a-56fa-4880-38be-08d71ece7f79 X-MS-Exchange-CrossTenant-Id: 5d471751-9675-428d-917b-70f44f9630b0 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5d471751-9675-428d-917b-70f44f9630b0;Ip=[131.228.2.8];Helo=[fihe3nok0734.emea.nsn-net.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR07MB3877 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lingyan Xu In current i801 driver, SMBALERT interrupt is allowed (Slave Command Register bit2 is 0). But these is no handler for SMBALERT interrupt in i801_isr, if there is SMBALERT interrupt asserted and deasserted, i801 will have an irq flood for the related status bit is setted. So SMBALERT interrupt handler is needed, and also, SMBALERT interrupt will be generated from time to time if slave chip have some fault. So disable SMBALERT interrupt is also needed. About the solution, please see http://www.farnell.com/datasheets/1581967.pdf Page632 P640 for more. Signed-off-by: Lingyan Xu --- drivers/i2c/busses/i2c-i801.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index f295693..033bafe 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -661,9 +661,11 @@ static irqreturn_t i801_isr(int irq, void *dev_id) * Clear irq sources and report transaction result. * ->status must be cleared before the next transaction is started. */ + + outb_p(status, SMBHSTSTS(priv)); + status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS; if (status) { - outb_p(status, SMBHSTSTS(priv)); priv->status = status; wake_up(&priv->waitq); } @@ -1810,6 +1812,9 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) /* Default timeout in interrupt mode: 200 ms */ priv->adapter.timeout = HZ / 5; + /* Disable SMBALERT interrupt */ + outb_p(inb_p(SMBSLVCMD(priv)) | BIT(2), SMBSLVCMD(priv)); + if (dev->irq == IRQ_NOTCONNECTED) priv->features &= ~FEATURE_IRQ; -- 1.7.1