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[193.116.95.121]) by smtp.gmail.com with ESMTPSA id o3sm22833492pje.1.2019.08.19.07.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2019 07:22:46 -0700 (PDT) Date: Tue, 20 Aug 2019 00:22:35 +1000 From: Nicholas Piggin Subject: Re: [PATCH v10 2/7] powerpc/mce: Fix MCE handling for huge pages To: Linux Kernel , linuxppc-dev , Santosh Sivaraj Cc: "Aneesh Kumar K.V" , Reza Arbab , Balbir Singh , Chandan Rajendra , christophe leroy , Mahesh Salgaonkar , Mahesh Salgaonkar , Michael Ellerman , stable@vger.kernel.org References: <20190815003941.18655-1-santosh@fossix.org> <20190815003941.18655-3-santosh@fossix.org> In-Reply-To: <20190815003941.18655-3-santosh@fossix.org> MIME-Version: 1.0 User-Agent: astroid/0.15.0 (https://github.com/astroidmail/astroid) Message-Id: <1566223931.kpuwkor3n7.astroid@bobo.none> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Santosh Sivaraj's on August 15, 2019 10:39 am: > From: Balbir Singh >=20 > The current code would fail on huge pages addresses, since the shift woul= d > be incorrect. Use the correct page shift value returned by > __find_linux_pte() to get the correct physical address. The code is more > generic and can handle both regular and compound pages. >=20 > Fixes: ba41e1e1ccb9 ("powerpc/mce: Hookup derror (load/store) UE errors") > Signed-off-by: Balbir Singh > [arbab@linux.ibm.com: Fixup pseries_do_memory_failure()] > Signed-off-by: Reza Arbab > Co-developed-by: Santosh Sivaraj > Signed-off-by: Santosh Sivaraj > Tested-by: Mahesh Salgaonkar > Cc: stable@vger.kernel.org # v4.15+ > --- > arch/powerpc/include/asm/mce.h | 2 +- > arch/powerpc/kernel/mce_power.c | 55 ++++++++++++++-------------- > arch/powerpc/platforms/pseries/ras.c | 9 ++--- > 3 files changed, 32 insertions(+), 34 deletions(-) >=20 > diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mc= e.h > index a4c6a74ad2fb..f3a6036b6bc0 100644 > --- a/arch/powerpc/include/asm/mce.h > +++ b/arch/powerpc/include/asm/mce.h > @@ -209,7 +209,7 @@ extern void release_mce_event(void); > extern void machine_check_queue_event(void); > extern void machine_check_print_event_info(struct machine_check_event *e= vt, > bool user_mode, bool in_guest); > -unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr); > +unsigned long addr_to_phys(struct pt_regs *regs, unsigned long addr); > #ifdef CONFIG_PPC_BOOK3S_64 > void flush_and_reload_slb(void); > #endif /* CONFIG_PPC_BOOK3S_64 */ > diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_po= wer.c > index a814d2dfb5b0..e74816f045f8 100644 > --- a/arch/powerpc/kernel/mce_power.c > +++ b/arch/powerpc/kernel/mce_power.c > @@ -20,13 +20,14 @@ > #include > =20 > /* > - * Convert an address related to an mm to a PFN. NOTE: we are in real > - * mode, we could potentially race with page table updates. > + * Convert an address related to an mm to a physical address. > + * NOTE: we are in real mode, we could potentially race with page table = updates. > */ > -unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr) > +unsigned long addr_to_phys(struct pt_regs *regs, unsigned long addr) > { > - pte_t *ptep; > - unsigned long flags; > + pte_t *ptep, pte; > + unsigned int shift; > + unsigned long flags, phys_addr; > struct mm_struct *mm; > =20 > if (user_mode(regs)) > @@ -35,14 +36,21 @@ unsigned long addr_to_pfn(struct pt_regs *regs, unsig= ned long addr) > mm =3D &init_mm; > =20 > local_irq_save(flags); > - if (mm =3D=3D current->mm) > - ptep =3D find_current_mm_pte(mm->pgd, addr, NULL, NULL); > - else > - ptep =3D find_init_mm_pte(addr, NULL); > + ptep =3D __find_linux_pte(mm->pgd, addr, NULL, &shift); > local_irq_restore(flags); > + > if (!ptep || pte_special(*ptep)) > return ULONG_MAX; > - return pte_pfn(*ptep); > + > + pte =3D *ptep; > + if (shift > PAGE_SHIFT) { > + unsigned long rpnmask =3D (1ul << shift) - PAGE_SIZE; > + > + pte =3D __pte(pte_val(pte) | (addr & rpnmask)); > + } > + phys_addr =3D pte_pfn(pte) << PAGE_SHIFT; > + > + return phys_addr; > } This should remain addr_to_pfn I think. None of the callers care what size page the EA was mapped with. 'pfn' is referring to the Linux pfn, which is the small page number. if (shift > PAGE_SHIFT) return (pte_pfn(*ptep) | ((addr & ((1UL << shift) - 1)) >> PAGE_SHIFT); else return pte_pfn(*ptep); Something roughly like that, then you don't have to change any callers or am I missing something? Thanks, Nick =