From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9562EC3A59B for ; Wed, 21 Aug 2019 10:16:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 71CAF23405 for ; Wed, 21 Aug 2019 10:16:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727926AbfHUKQZ (ORCPT ); Wed, 21 Aug 2019 06:16:25 -0400 Received: from inva020.nxp.com ([92.121.34.13]:44574 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726227AbfHUKQU (ORCPT ); Wed, 21 Aug 2019 06:16:20 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5BF3D1A00C1; Wed, 21 Aug 2019 12:16:18 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 4D2A01A01DF; Wed, 21 Aug 2019 12:16:18 +0200 (CEST) Received: from fsr-ub1664-120.ea.freescale.net (fsr-ub1664-120.ea.freescale.net [10.171.82.81]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 9B200205D3; Wed, 21 Aug 2019 12:16:17 +0200 (CEST) From: Robert Chiras To: =?UTF-8?q?Guido=20G=C3=BCnther?= , Marek Vasut , Stefan Agner , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Pengutronix Kernel Team , NXP Linux Team , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 03/15] drm/mxsfb: Add defines for the rest of registers Date: Wed, 21 Aug 2019 13:15:43 +0300 Message-Id: <1566382555-12102-4-git-send-email-robert.chiras@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1566382555-12102-1-git-send-email-robert.chiras@nxp.com> References: <1566382555-12102-1-git-send-email-robert.chiras@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some of the existing registers in this controller are not defined, but also not used. Add them to the register definitions, so that they can be easily used in future improvements or fixes. Signed-off-by: Robert Chiras --- drivers/gpu/drm/mxsfb/mxsfb_regs.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h b/drivers/gpu/drm/mxsfb/mxsfb_regs.h index 932d7ea..71426aa 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_regs.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h @@ -14,19 +14,31 @@ #define LCDC_CTRL 0x00 #define LCDC_CTRL1 0x10 +#define LCDC_V4_CTRL2 0x20 #define LCDC_V3_TRANSFER_COUNT 0x20 #define LCDC_V4_TRANSFER_COUNT 0x30 #define LCDC_V4_CUR_BUF 0x40 #define LCDC_V4_NEXT_BUF 0x50 #define LCDC_V3_CUR_BUF 0x30 #define LCDC_V3_NEXT_BUF 0x40 +#define LCDC_TIMING 0x60 #define LCDC_VDCTRL0 0x70 #define LCDC_VDCTRL1 0x80 #define LCDC_VDCTRL2 0x90 #define LCDC_VDCTRL3 0xa0 #define LCDC_VDCTRL4 0xb0 +#define LCDC_DVICTRL0 0xc0 +#define LCDC_DVICTRL1 0xd0 +#define LCDC_DVICTRL2 0xe0 +#define LCDC_DVICTRL3 0xf0 +#define LCDC_DVICTRL4 0x100 +#define LCDC_V4_DATA 0x180 +#define LCDC_V3_DATA 0x1b0 #define LCDC_V4_DEBUG0 0x1d0 #define LCDC_V3_DEBUG0 0x1f0 +#define LCDC_AS_CTRL 0x210 +#define LCDC_AS_BUF 0x220 +#define LCDC_AS_NEXT_BUF 0x230 #define CTRL_SFTRST (1 << 31) #define CTRL_CLKGATE (1 << 30) @@ -45,12 +57,15 @@ #define CTRL_DF24 (1 << 1) #define CTRL_RUN (1 << 0) +#define CTRL1_RECOVERY_ON_UNDERFLOW (1 << 24) #define CTRL1_FIFO_CLEAR (1 << 21) #define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16) #define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf) #define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13) #define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9) +#define CTRL2_OUTSTANDING_REQS__REQ_16 (4 << 21) + #define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) #define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff) #define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff) -- 2.7.4