From: Ashish Kumar <Ashish.Kumar@nxp.com>
To: tudor.ambarus@microchip.com, marek.vasut@gmail.com,
dwmw2@infradead.org, computersforpeace@gmail.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
linux-mtd@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, Ashish Kumar <Ashish.Kumar@nxp.com>,
Kuldeep Singh <kuldeep.singh@nxp.com>
Subject: [PATCH v4] mtd: spi-nor: Rename n25q512a to mt25qu512a(n25q512a)
Date: Thu, 29 Aug 2019 17:37:25 +0530 [thread overview]
Message-ID: <1567080445-32695-2-git-send-email-Ashish.Kumar@nxp.com> (raw)
In-Reply-To: <1567080445-32695-1-git-send-email-Ashish.Kumar@nxp.com>
mt25qu512a is rebranded after its spinoff from STM, so it is
different only in term of operating frequency, JEDEC id
is same as that of n25q512a.
SPI_NOR_4B_OPCODES is appended to flash property.
This flash is tested for Single I/O and QUAD I/O mode on LS1046FRWY.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
---
v4:
-Reword commit message as per review comments from
tudor.
- split into seperate patch
v3:
-Reword commits msg
-rebase to top of mtd-linux spi-nor/next
v2:
Incorporate review comments from Vignesh
drivers/mtd/spi-nor/spi-nor.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 73172d7f512b..b585f3fee4f0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1876,7 +1876,18 @@ static const struct flash_info spi_nor_ids[] = {
{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },
{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) },
- { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+
+ /* Micron */
+ /* n25q512a is rebraned as mt25qu512a after spin-off from ST,
+ * JEDEC id remains same.
+ * Operational frequency and Read Performance has increased
+ */
+ {
+ "mt25qu512a(n25q512a)", INFO(0x20bb20, 0, 64 * 1024, 1024,
+ SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
+ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES)
+ },
+
{ "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
{ "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
--
2.17.1
next prev parent reply other threads:[~2019-08-29 12:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 12:07 [PATCH v4] mtd: spi-nor: Add flash property for mt35xu02g Ashish Kumar
2019-08-29 12:07 ` Ashish Kumar [this message]
2019-08-30 7:16 ` [PATCH v4] mtd: spi-nor: Rename n25q512a to mt25qu512a(n25q512a) Tudor.Ambarus
2019-08-30 7:16 ` [PATCH v4] mtd: spi-nor: Add flash property for mt35xu02g Tudor.Ambarus
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