From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06388C3A5A3 for ; Fri, 30 Aug 2019 06:12:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C58192087F for ; Fri, 30 Aug 2019 06:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727626AbfH3GMr (ORCPT ); Fri, 30 Aug 2019 02:12:47 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:64684 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727156AbfH3GMq (ORCPT ); Fri, 30 Aug 2019 02:12:46 -0400 X-UUID: f23dc1529da6496e8313aee092cad3a8-20190830 X-UUID: f23dc1529da6496e8313aee092cad3a8-20190830 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 885994755; Fri, 30 Aug 2019 14:11:49 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 30 Aug 2019 14:11:47 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 30 Aug 2019 14:11:47 +0800 Message-ID: <1567145502.5942.15.camel@mtksdaap41> Subject: Re: [PATCH v5, 24/32] drm/mediatek: add clock property check before get it From: CK Hu To: CC: Philipp Zabel , Rob Herring , Matthias Brugger , "David Airlie" , Daniel Vetter , Mark Rutland , , , , , Date: Fri, 30 Aug 2019 14:11:42 +0800 In-Reply-To: <1567090254-15566-25-git-send-email-yongqiang.niu@mediatek.com> References: <1567090254-15566-1-git-send-email-yongqiang.niu@mediatek.com> <1567090254-15566-25-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: AC63B56FAA0B5FFE3064F062EFE487F75FF6A0918ACADC649B94CFF7E07E14872000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add clock property check before get it > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index a5a6689..effc24a 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -657,10 +657,12 @@ static int mtk_ddp_probe(struct platform_device *pdev) > for (i = 0; i < 10; i++) > ddp->mutex[i].id = i; > > - ddp->clk = devm_clk_get(dev, NULL); > - if (IS_ERR(ddp->clk)) { > - dev_err(dev, "Failed to get clock\n"); > - return PTR_ERR(ddp->clk); > + if (of_find_property(dev->of_node, "clocks", &i)) { > + ddp->clk = devm_clk_get(dev, NULL); > + if (IS_ERR(ddp->clk)) { > + dev_err(dev, "Failed to get clock\n"); > + return PTR_ERR(ddp->clk); > + } Only "mediatek,mt8133-disp-mutex" has no clock property. For other SoC, clock property is required. So I think this exception is just for mt8183. Regards, CK > } > > regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);