From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E890C47404 for ; Wed, 9 Oct 2019 07:41:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 517B42133F for ; Wed, 9 Oct 2019 07:41:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730156AbfJIHlh (ORCPT ); Wed, 9 Oct 2019 03:41:37 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:19142 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729983AbfJIHlc (ORCPT ); Wed, 9 Oct 2019 03:41:32 -0400 X-UUID: 6562670a30264e0fa84464cf32ffd9c0-20191009 X-UUID: 6562670a30264e0fa84464cf32ffd9c0-20191009 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 27623975; Wed, 09 Oct 2019 15:41:16 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 9 Oct 2019 15:41:13 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 9 Oct 2019 15:41:12 +0800 From: Chunfeng Yun To: Kishon Vijay Abraham I , Rob Herring CC: Mark Rutland , Matthias Brugger , Chunfeng Yun , , , , Subject: [RESEND PATCH v3 07/11] phy: phy-mtk-tphy: add a property for internal resistance Date: Wed, 9 Oct 2019 15:40:30 +0800 Message-ID: <1570606834-5644-7-git-send-email-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1570606834-5644-1-git-send-email-chunfeng.yun@mediatek.com> References: <1570606834-5644-1-git-send-email-chunfeng.yun@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: D6193D412A76A036B9AA2F1A8EC1E37A62667789B8F9CB6CC8C6E466BB1A36CF2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is used to tune J-K voltage by internal R (resistance) Signed-off-by: Chunfeng Yun --- v3: change commit log v2: no changes --- drivers/phy/mediatek/phy-mtk-tphy.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c index 5afe33621dbc..4a2dc92f10f5 100644 --- a/drivers/phy/mediatek/phy-mtk-tphy.c +++ b/drivers/phy/mediatek/phy-mtk-tphy.c @@ -43,6 +43,8 @@ #define PA0_RG_USB20_INTR_EN BIT(5) #define U3P_USBPHYACR1 0x004 +#define PA1_RG_INTR_CAL GENMASK(23, 19) +#define PA1_RG_INTR_CAL_VAL(x) ((0x1f & (x)) << 19) #define PA1_RG_VRT_SEL GENMASK(14, 12) #define PA1_RG_VRT_SEL_VAL(x) ((0x7 & (x)) << 12) #define PA1_RG_TERM_SEL GENMASK(10, 8) @@ -302,6 +304,7 @@ struct mtk_phy_instance { int eye_src; int eye_vrt; int eye_term; + int intr; int discth; bool bc12_en; }; @@ -853,12 +856,14 @@ static void phy_parse_property(struct mtk_tphy *tphy, &instance->eye_vrt); device_property_read_u32(dev, "mediatek,eye-term", &instance->eye_term); + device_property_read_u32(dev, "mediatek,intr", + &instance->intr); device_property_read_u32(dev, "mediatek,discth", &instance->discth); - dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, disc:%d\n", + dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, intr:%d, disc:%d\n", instance->bc12_en, instance->eye_src, instance->eye_vrt, instance->eye_term, - instance->discth); + instance->intr, instance->discth); } static void u2_phy_props_set(struct mtk_tphy *tphy, @@ -895,6 +900,13 @@ static void u2_phy_props_set(struct mtk_tphy *tphy, writel(tmp, com + U3P_USBPHYACR1); } + if (instance->intr) { + tmp = readl(com + U3P_USBPHYACR1); + tmp &= ~PA1_RG_INTR_CAL; + tmp |= PA1_RG_INTR_CAL_VAL(instance->intr); + writel(tmp, com + U3P_USBPHYACR1); + } + if (instance->discth) { tmp = readl(com + U3P_USBPHYACR6); tmp &= ~PA6_RG_U2_DISCTH; -- 2.23.0