From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DF48C10F14 for ; Tue, 15 Oct 2019 05:25:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6E1EC2053B for ; Tue, 15 Oct 2019 05:25:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728305AbfJOFZ4 (ORCPT ); Tue, 15 Oct 2019 01:25:56 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:27611 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728254AbfJOFZz (ORCPT ); Tue, 15 Oct 2019 01:25:55 -0400 X-UUID: f6e622fa625d41909af3235d2d7e170c-20191015 X-UUID: f6e622fa625d41909af3235d2d7e170c-20191015 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 2005909881; Tue, 15 Oct 2019 13:25:41 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 15 Oct 2019 13:25:39 +0800 Received: from [10.17.3.153] (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 15 Oct 2019 13:25:39 +0800 Message-ID: <1571117141.19130.82.camel@mhfsdcap03> Subject: Re: [PATCH v3 6/7] iommu/mediatek: Use writel for TLB range invalidation From: Yong Wu To: Robin Murphy CC: Matthias Brugger , Joerg Roedel , Will Deacon , , , Nicolas Boichat , , , , , , Evan Green , Tomasz Figa , , , Date: Tue, 15 Oct 2019 13:25:41 +0800 In-Reply-To: References: <1571035101-4213-1-git-send-email-yong.wu@mediatek.com> <1571035101-4213-7-git-send-email-yong.wu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: F7B169CFC27DA96FE703EAD572803384264DF78C3B40C94DC763E2363F6E10A82000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2019-10-14 at 15:04 +0100, Robin Murphy wrote: > On 14/10/2019 07:38, Yong Wu wrote: > > Use writel for the register F_MMU_INV_RANGE which is for triggering the > > HW work. We expect all the setting(iova_start/iova_end...) have already > > been finished before F_MMU_INV_RANGE. > > For Arm CPUs, these registers should be mapped as Device memory, > therefore the same-peripheral rule should implicitly enforce that the > accesses are made in program order, hence you're unlikely to have seen a > problem in reality. However, the logical reasoning for the change seems > valid in general, so I'd argue that it's still worth making if only for > the sake of good practice: > > Acked-by: Robin Murphy Thanks very much for the view. If this patch is not so necessary, I will remove it this time. > > > Signed-off-by: Anan.Sun > > Signed-off-by: Yong Wu > > --- > > drivers/iommu/mtk_iommu.c | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > > index dbbacc3..d285457 100644 > > --- a/drivers/iommu/mtk_iommu.c > > +++ b/drivers/iommu/mtk_iommu.c > > @@ -187,8 +187,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size, > > writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A); > > writel_relaxed(iova + size - 1, > > data->base + REG_MMU_INVLD_END_A); > > - writel_relaxed(F_MMU_INV_RANGE, > > - data->base + REG_MMU_INVALIDATE); > > + writel(F_MMU_INV_RANGE, data->base + REG_MMU_INVALIDATE); > > > > /* tlb sync */ > > ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE, > > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek