From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UPPERCASE_50_75,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5FE3CA9EC7 for ; Thu, 31 Oct 2019 00:07:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7006720856 for ; Thu, 31 Oct 2019 00:07:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="IqUeK8xU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727973AbfJaAHg (ORCPT ); Wed, 30 Oct 2019 20:07:36 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:3017 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727918AbfJaAHd (ORCPT ); Wed, 30 Oct 2019 20:07:33 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 30 Oct 2019 17:07:37 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Wed, 30 Oct 2019 17:07:31 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 30 Oct 2019 17:07:31 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 31 Oct 2019 00:07:30 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 31 Oct 2019 00:07:30 +0000 Received: from vdumpa-ubuntu.nvidia.com (Not Verified[172.17.173.140]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 30 Oct 2019 17:07:30 -0700 From: Krishna Reddy CC: , , , , , , , , , , , , , , , , , , Krishna Reddy Subject: [PATCH v4 5/6] arm64: tegra: Add DT node for T194 SMMU Date: Wed, 30 Oct 2019 17:07:16 -0700 Message-ID: <1572480437-28449-6-git-send-email-vdumpa@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1572480437-28449-1-git-send-email-vdumpa@nvidia.com> References: <1572480437-28449-1-git-send-email-vdumpa@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1572480457; bh=tqLHlhwV6+T9UcYIe3S/OScCHaVWaVpXBJd2VMOOnfE=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=IqUeK8xU4KuA+l4yRCeW62ps1/7QteYVWni0/F7YzrSOiQH6HAbuilIhYMp8pfpGq 8IFbjbSfAnX/08yrtGUXxDIhLyO8hYCl1ZU1FPXTj4H1wphjOQWj/5CaOFcpgIHDGe 76edUJ6vzAjNYw+Ja/vWJ5P/jinHQQb45tNh320QVSX90C200WkAN56CPAqYqn3MIj qqpYMZI3zGWjh64gjWt0Iy5H+cSmgX5pHmdQDQwv40WBdCB4FLxNk5sc+zoTmnlkMb /MOAfCc+56u2r0wheO0JpkWjgfVVajo6znoVULGfazkE07d5qdr8sQECk5lBzlSxTB jv1gsYYzdO/TQ== To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT node for T194 SMMU to enable SMMU support. Signed-off-by: Krishna Reddy --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 77 ++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 1e0b54b..6f81e90 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1436,6 +1436,83 @@ 0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ }; + smmu: iommu@12000000 { + compatible = "arm,mmu-500","nvidia,tegra194-smmu"; + reg = <0 0x12000000 0 0x800000>, + <0 0x11000000 0 0x800000>, + <0 0x10000000 0 0x800000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + stream-match-mask = <0x7f80>; + #global-interrupts = <3>; + #iommu-cells = <1>; + }; + sysram@40000000 { compatible = "nvidia,tegra194-sysram", "mmio-sram"; reg = <0x0 0x40000000 0x0 0x50000>; -- 2.7.4