From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org
Cc: joro@8bytes.org, Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH 0/2] iommu/amd: Fixes for x2APIC support
Date: Wed, 20 Nov 2019 07:55:47 -0600 [thread overview]
Message-ID: <1574258149-15602-1-git-send-email-suravee.suthikulpanit@amd.com> (raw)
Adding feature support check for MMIO access to MSI capability
block registers when enabling x2APIC (XT) mode. Also fix up logic
for checking XT feature support for IVHD type 10h.
Suravee Suthikulpanit (2):
iommu/amd: Check feature support bit before accessing MSI capability
registers
iommu/amd: Only support x2APIC with IVHD type 11h/40h
drivers/iommu/amd_iommu_init.c | 19 ++++++++++++-------
drivers/iommu/amd_iommu_types.h | 2 +-
2 files changed, 13 insertions(+), 8 deletions(-)
--
1.8.3.1
next reply other threads:[~2019-11-20 13:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-20 13:55 Suravee Suthikulpanit [this message]
2019-11-20 13:55 ` [PATCH 1/2] iommu/amd: Check feature support bit before accessing MSI capability registers Suravee Suthikulpanit
2019-11-20 13:55 ` [PATCH 2/2] iommu/amd: Only support x2APIC with IVHD type 11h/40h Suravee Suthikulpanit
2019-12-17 9:34 ` [PATCH 0/2] iommu/amd: Fixes for x2APIC support Joerg Roedel
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