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Tue, 26 Nov 2019 15:02:28 +0000 From: Sanjay R Mehta To: Shyam-sundar.S-k@amd.com, linjiasen@hygon.cn, arindam.nath@amd.com, jdmason@kudzu.us, dave.jiang@intel.com, allenbh@gmail.com Cc: linux-ntb@googlegroups.com, linux-kernel@vger.kernel.org, Sanjay R Mehta Subject: [PATCH] NTB: Fix access to link status and control register Date: Tue, 26 Nov 2019 09:01:16 -0600 Message-Id: <1574780476-4423-1-git-send-email-Sanju.Mehta@amd.com> X-Mailer: git-send-email 2.7.4 Content-Type: text/plain X-ClientProxiedBy: MA1PR01CA0103.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:1::19) To MN2PR12MB3455.namprd12.prod.outlook.com (2603:10b6:208:d0::22) MIME-Version: 1.0 X-Mailer: git-send-email 2.7.4 X-Originating-IP: [165.204.156.251] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: b7bcbdb1-6fca-47fc-68d5-08d77281a7c7 X-MS-TrafficTypeDiagnostic: MN2PR12MB3119:|MN2PR12MB3119:|MN2PR12MB3119: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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The link training happens on the SWUS and not on the secondary endpoint. So to correctly return the link status on the NTB secondary, we need to read the link status of the SWUS. Signed-off-by: Jiasen Lin Signed-off-by: Arindam Nath Signed-off-by: Sanjay R Mehta --- drivers/ntb/hw/amd/ntb_hw_amd.c | 45 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 41 insertions(+), 4 deletions(-) diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c index ae91105..758f748 100644 --- a/drivers/ntb/hw/amd/ntb_hw_amd.c +++ b/drivers/ntb/hw/amd/ntb_hw_amd.c @@ -842,6 +842,9 @@ static inline void ndev_init_struct(struct amd_ntb_dev *ndev, static int amd_poll_link(struct amd_ntb_dev *ndev) { void __iomem *mmio = ndev->peer_mmio; + struct pci_dev *pdev = NULL; + struct pci_dev *pci_swds = NULL; + struct pci_dev *pci_swus = NULL; u32 reg, stat; int rc; @@ -855,10 +858,44 @@ static int amd_poll_link(struct amd_ntb_dev *ndev) ndev->cntl_sta = reg; - rc = pcie_capability_read_dword(ndev->ntb.pdev, - PCI_EXP_LNKCTL, &stat); - if (rc) - return 0; + if (ndev->ntb.topo == NTB_TOPO_SEC) { + /* + * Locate the pointer to Downstream Switch for + * this device + */ + pci_swds = pci_upstream_bridge(ndev->ntb.pdev); + if (pci_swds) { + /* + * Locate the pointer to Upstream Switch for + * this device + */ + pci_swus = pci_upstream_bridge(pci_swds); + if (pci_swus) { + /* + * Read the PCIe Link Control and + * Status register + */ + rc = pcie_capability_read_dword(pci_swus, + PCI_EXP_LNKCTL, &stat); + if (rc) + return 0; + } else { + return 0; + } + } else { + return 0; + } + } else if (ndev->ntb.topo == NTB_TOPO_PRI) { + /* + * For NTB primary, we simply read the Link Status and control + * register of the NTB device itself. + */ + pdev = ndev->ntb.pdev; + rc = pcie_capability_read_dword(pdev, PCI_EXP_LNKCTL, &stat); + if (rc) + return 0; + } + ndev->lnk_sta = stat; return 1; -- 2.7.4