[PATCH RFC 7/8] dt-bindings: display: add Unisoc's generic mipi panel bindings

[Kevin Tang <kevin3.tang@gmail.com>]

From: Kevin Tang <kevin.tang@unisoc.com>

Adds generic MIPI panel support for Unisoc's display subsystem.

Cc: Orson Zhai <orsonzhai@gmail.com>
Cc: Baolin Wang <baolin.wang@linaro.org>
Cc: Chunyan Zhang <zhang.lyra@gmail.com>
Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>
---
 .../devicetree/bindings/display/sprd/panel.txt     | 110 +++++++++++++++++++++
 1 file changed, 110 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/sprd/panel.txt

diff --git a/Documentation/devicetree/bindings/display/sprd/panel.txt b/Documentation/devicetree/bindings/display/sprd/panel.txt
new file mode 100644
index 0000000..a4017af
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sprd/panel.txt
@@ -0,0 +1,110 @@
+Unisoc Generic MIPI Panel
+================================================================
+
+Required properties:
+  - compatible: must be "sprd,generic-mipi-panel"
+  - reg: panel ID
+  - #address-cells, #size-cells: should be set respectively to <1> and <0>
+  - port: video port for DPI input
+  - sprd,dsi-work-mode: the following dsi mode can be select:
+	0: cmd mode,
+	1: video burst mode,
+	2: video non-burst mode with sync pulse,
+	3: video non-burst mode with sync event
+  - sprd,dsi-lane-number: number of dsi lanes to use, default is 4
+  - sprd,dsi-color-format: data format for video stream transmission, currently
+	supports "rgb888", "rgb666", "rgb666_packed", "rgb565" and "dsc", defaults rgb888
+  - sprd,phy-bit-clock: the transmission rate of the clock lane for High-Speed,
+	the unit is Kbps, and the default value is 500Mbps
+  - sprd,phy-escape-clock: the transmission rate of the clock lane for Low-Power,
+	the unit is Kbps, and the default value is 20Mbps
+
+
+Optional properties:
+  - width-mm: see [2] for details
+  - height-mm: see [2] for details
+  - sprd,esd-check-enable: esd check function enable switch
+  - sprd,esd-check-mode: esd detection method, default is register
+	0: register,
+	1: TE signal
+  - sprd,esd-check-period: esd detection cycle, unit ms, default 1000ms
+  - sprd,esd-check-register: if register detection is used, this attribute must be configured
+  - sprd,esd-check-value: if register detection is used, this attribute must be configured
+  - sprd,reset-on-sequence: timing of the reset pin when the lcd power on
+	<1 5>, <0 5> means first keep high for 5ms, then keep low for 5ms
+  - sprd,reset-on-sequence: timing of the reset pin when the lcd power off
+  - sprd,use-dcs-write: bool attribute, indicating whether to use the dcs to send inital & sleep cmds,
+	default use generic
+  - sprd,initial-command: lcd initialization command set
+  - sprd,sleep-in-command: lcd suspend command set
+  - sprd,sleep-out-command: lcd resume command set
+  - display-timings: see [1] for details
+
+
+	[1] Documentation/devicetree/bindings/display/panel/display-timing.txt
+	[2] Documentation/devicetree/bindings/display/panel/panel-common.yaml
+
+Example
+-------
+
+Panel specific DT entry:
+
+	&dsi {
+		panel {
+			compatible = "sprd,generic-mipi-panel";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			port {
+				reg = <1>;
+				panel_in: endpoint {
+					remote-endpoint = <&dphy_out>;
+				};
+			};
+		};
+	};
+
+	/ { lcds {
+        lcd_mipi_hd: lcd_mipi_hd {
+                sprd,dsi-work-mode = <1>;
+                sprd,dsi-lane-number = <4>;
+                sprd,dsi-color-format = "rgb888";
+                sprd,phy-bit-clock = <1100000>;
+                sprd,phy-escape-clock = <20000>;
+                width-mm = <68>;
+                height-mm = <121>;
+                sprd,esd-check-enable = <0>;
+                sprd,esd-check-mode = <0>;
+                sprd,esd-check-period = <1000>;
+                sprd,esd-check-register = <0x0A>;
+                sprd,esd-check-value = <0x9C>;
+                sprd,reset-on-sequence = <1 5>, <0 5>, <1 20>;
+                sprd,reset-off-sequence = <0 5>;
+                sprd,use-dcs-write;
+                sprd,initial-command = [
+                        39 00 00 02 b0 00
+                        39 00 00 04 B3 31 00 06
+                        ];
+                sprd,sleep-in-command = [
+                        13 0A 00 01 28
+                        13 78 00 01 10
+                        ];
+                sprd,sleep-out-command = [
+                        13 78 00 01 11
+                        13 32 00 01 29
+                        ];
+                display-timings {
+                        timing0 {
+                                clock-frequency = <64000000>;
+                                hactive = <720>;
+                                vactive = <1280>;
+                                hback-porch = <31>;
+                                hfront-porch = <31>;
+                                vback-porch = <32>;
+                                vfront-porch = <16>;
+                                hsync-len = <20>;
+                                vsync-len = <2>;
+                        };
+                };
+        };
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2.7.4