From: sherry sun <sherry.sun@nxp.com>
To: bp@alien8.de, mchehab@kernel.org, tony.luck@intel.com,
james.morse@arm.com, rrichter@marvell.com,
michal.simek@xilinx.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, robh+dt@kernel.org, mark.rutland@arm.com
Cc: linux-edac@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-imx@nxp.com, frank.li@nxp.com
Subject: [PATCH 2/3] EDAC: Add synopsys edac driver support for i.MX8MP
Date: Fri, 21 Feb 2020 14:39:15 +0800 [thread overview]
Message-ID: <1582267156-20189-3-git-send-email-sherry.sun@nxp.com> (raw)
In-Reply-To: <1582267156-20189-1-git-send-email-sherry.sun@nxp.com>
From: Sherry Sun <sherry.sun@nxp.com>
The i.MX8MP has a memory controller supported by this driver. So here
add edac driver for i.MX8MP based on synopsys edac driver.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
drivers/edac/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index fe2eb892a1bd..58a2d67d5513 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -475,7 +475,7 @@ config EDAC_ARMADA_XP
config EDAC_SYNOPSYS
tristate "Synopsys DDR Memory Controller"
- depends on ARCH_ZYNQ || ARCH_ZYNQMP
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_MXC
help
Support for error detection and correction on the Synopsys DDR
memory controller.
--
2.17.1
next prev parent reply other threads:[~2020-02-21 6:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-21 6:39 [PATCH 0/3] Add edac driver for i.MX8MP based on synopsys edac driver sherry sun
2020-02-21 6:39 ` [PATCH 1/3] dt-bindings: memory-controllers: Add i.MX8MP DDRC binding doc sherry sun
2020-02-26 17:24 ` Rob Herring
2020-02-27 6:40 ` Sherry Sun
2020-02-21 6:39 ` sherry sun [this message]
2020-02-21 6:39 ` [PATCH 3/3] EDAC: synopsys: Add edac driver support for i.MX8MP sherry sun
2020-02-26 17:12 ` James Morse
2020-02-27 5:00 ` Sherry Sun
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